村田电容选型手册，2021最新版

伯克利的riscv处理器rocket处理器的相关lab教程，有很多关于rocket chip的关键信息。

riscv-rocket-chip-generator-tutorial-hpca2015.pdf RISC-V “Rocket Chip” SoC Generator in Chisel

CH340驱动一个好的软件.zip

常见的SOC互联总线介绍

MICROCHIP 芯片 PIC12F615 中文数据手册

"Network-on-Chip Architectures: A Holistic Design Exploration" by Chrysostomos Nicopoulos Publisher: Springer | ISBN: 9048130301 | 2009 | PDF | 223 pages | 9 Mb The continuing reduction of feature sizes into the nanoscale regime has led to dramatic increases in transistor densities. Integration at these levels has highlighted the criticality of the on-chip interconnects. Network-on-Chip (NoC) architectures are viewed as a possible solution to burgeoning global wiring delays in many-core chips, and have recently crystallized into a significant research domain. On-chip networks instill a new flavor to communication research due to their inherently resource-constrained nature. Despite the lightweight character demanded of the NoC components, modern designs require ultra-low communication latencies in order to cope with inflating data bandwidths. The work presented in Network-on-Chip Architectures addresses these issues through a comprehensive exploration of the design space. The design aspects of the NoC are viewed through a penta-faceted prism encompassing five major issues: (1) performance, (2) silicon area consumption, (3) power/energy efficiency, (4) reliability, and (5) variability. These five aspects serve as the fundamental design drivers and critical evaluation metrics in the quest for efficient NoC implementations. The research exploration employs a two-pronged approach: (a) MICRO-architectural innovations within the major NoC components, and (b) MACRO-architectural choices aiming to seamlessly merge the interconnection backbone with the remaining system modules. These two research threads and the aforementioned five key metrics mount a holistic and in-depth attack on most issues surrounding the design of NoCs in multi-core architectures.

Chip-seq流程详解

ARM System-on-Chip Architecture 2nd Edition

IC 設計Low Power 經典. Springer 出版, 內容概述如何設計低功耗SOC