PeakRDL-verilog 从编译的SystemRDL输入生成Verilog寄存器模型 正在安装 目前仅从github安装。 出口商用法 将详细的输出传递给。 import sys from systemrdl import RDLCompiler , RDLCompileError from peakrdl . verilog import VerilogExporter rdlc = RDLCompiler () try : rdlc . compile_file ( "path/to/my.rdl" ) root = rdlc . elaborate () except RDLCompileError : sys . exit ( 1 ) exporter = VerilogExporter () exporter . export ( root ,

SystemRDL 2.0: A Register Description Language Specification