DDR原理简介及相关测试PPT教案.pptx

imx8qxp的ddr校准工具

DDR功耗计算 里面包含了DDR的datesheet 系统配置介绍，功耗计算明细，DDR系统计算模块各个方面的说明

3128 使用EMCP的补丁

ddr_datasheet_xilinx

用作Xilinx xdma pcie 读写DDR3 的速度测试例程

DOUBLE DATA RATE(DDR) SDRAM VDD = +2.5V ±0.2V, VDDQ = +2.5V ±0.2V • Bidirectional data strobe (DQS) transmitted/ received with data, i.e., source-synchronous data capture (x16 has two – one per byte) • Internal, pipelined double-data-rate (DDR) architecture; two data accesses per clock cycle • Differential clock inputs (CK and CK#) • Commands entered on each positive CK edge • DQS edge-aligned with data for READs; centeraligned with data for WRITEs • DLL to align DQ and DQS transitions with CK • Four internal banks for concurrent operation • Data mask (DM) for masking write data (x16 has two – one per byte) • Programmable burst lengths: 2, 4, or 8 • Auto precharge option • Auto Refresh and Self Refresh Modes • Longer lead TSOP for improved reliability (OCPL) • 2.5V I/O (SSTL_2 compatible)

介绍实现ddr控制器的关键数据通路的结口设计

Nexys4-DDR的详细介绍，包括了管脚的对应内容，各个板块的基础原理

micron 256Mb ddr仿真模型，支持modelsim，VCS，ncverilog仿真