本书以实例讲解的方式对HDL语言的设计方法进行介绍。全书共分9章,第1章至第3章主要介绍了Verilog HDL语言的基本概念、设计流程、语法及建模方式等内容;第4章至第6章主要讨论如何合理地使用Verilog HDL语言描述高性能的可综合电路;第7章和第8章重点介绍了如何编写测试激励以及Verilog的仿真原理;第9章展望HDL语言的发展趋势。本书配有一张光盘,光盘中收录了书中示例的工程文件、设计源文件及说明文件等。另外为了配合读者进一步学习,光盘中还提供了Verilog 1995和Verilog 2001这两个版本的IEEE标准文献,读者可以从中查阅Verilog的语法细节。本书围绕设计和验证两大主题展开讨论,内容丰富,实用性强,可作为高等院校通信工程、电子工程、计算机、微电子和半导体等相关专业的教材,也可作为硬件工程师和IC工程师的参考书。 [1-2]
2020-01-15 03:02:34 13.85MB Verilog 吴继华 王诚
1
verilog的基础语法,如何使用verilog来设计FPGA
2020-01-13 03:05:43 406KB hdl
1
Verilog HDL 计数器加数码管动态显示程序。数电作业,自己编写的。
2020-01-08 03:07:44 3.72MB Verilog HDL 动态显示译码 计数器
1
As digital circuit elements decrease in physical size, resulting in increasingly complex systems, a basic logic model that can be used in the control and design of a range of semiconductor devices is vital. Finite State Machines (FSM) have numerous advantages; they can be applied to many areas (including motor control, and signal and serial data identification to name a few) and they use less logic than their alternatives, leading to the development of faster digital hardware systems. This clear and logical book presents a range of novel techniques for the rapid and reliable design of digital systems using FSMs, detailing exactly how and where they can be implemented. With a practical approach, it covers synchronous and asynchronous FSMs in the design of both simple and complex systems, and Petri–Net design techniques for sequential/parallel control systems. Chapters on Hardware Description Language cover the widely–used and powerful Verilog HDL in sufficient detail to facilitate the description and verification of FSMs, and FSM based systems, at both the gate and behavioural levels. Throughout, the text incorporates many real–world examples that demonstrate designs such as data acquisition, a memory tester, and passive serial data monitoring and detection, among others. A useful accompanying CD offers working Verilog software tools for the capture and simulation of design solutions. With a linear programmed learning format, this book works as a concise guide for the practising digital designer. This book will also be of importance to senior students and postgraduates of electronic engineering, who require design skills for the embedded systems market.
2020-01-03 11:43:26 2.91MB FSM ,Verilog HDL
1
《Verilog HDL数字控制系统设计实例》
2020-01-03 11:41:51 11.42MB Verilog
1
Verilog-A Language Reference Manual Analog Extensions to Verilog HDL------English version 1.0
2020-01-03 11:41:07 272KB Verilog-A Language Reference Manual Verilog
1
Verilog数字系统设计教程,夏宇闻版,RISC-CPU代码
2020-01-03 11:41:01 3KB CPU code RISC HDL
1
详细介绍了matlab的m文件,如何转换成FPGA硬件描述语言。
2020-01-03 11:41:00 383KB matlab hdl v
1
Verilog 开发入门书籍,适合初学者开发学习。内容齐全。
2020-01-03 11:39:55 58.81MB FPGA VERILOG
1
依据数码管的显示原理,实现数码管的动态扫描方法 运用Verilog HDL 语言的描述与建模的技巧和方法编程实现了数码管的动态扫描
2020-01-03 11:32:53 3KB EDA 数字电路 数码管扫描
1