三维 Lotka-Volterra 系统的多个极限环,罗勇,吕贵臣,各种由共生、竞争和捕食被捕食关系形成的三维 Lotka-Volterra 系统,已被证明了其存在多个极限环。本文中,在密度制约和非对角元素非零的
2024-03-02 11:05:47 136KB 首发论文
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三维类富勒烯炔聚合物,胡盟,何巨龙,通过第一性原理计算,理论设计了两种sp+sp3杂化构成的类富勒烯炔的碳结构,分别命名为3DFY-C30和3DFY-C50。二者是通过用C-C≡C-C替换fcc-C6�
2024-03-02 11:04:24 600KB 首发论文
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一个具有新颖三维开放骨架结构的磷酸铍化合物的合成,郭敏,李乙,通过加入乙醇胺,在中温水热条件下,一个分子式为Be1.5PO5H2的新颖的磷酸铍化合物1被成功合成出来。化合物1的结构是由二维3.4-网层通�
2024-03-02 11:02:10 284KB 首发论文
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用粒子滤波算法实现三维目标跟踪,用matlab实现。
主要介绍thermal在3D IC设计中的作用
2023-01-27 17:47:12 9.42MB 3D IC design
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Three Dimensional Integrated Circuit Design 主要讲述三维集成电路设计的EDA工具,设计技术以及微架构!!
2022-09-10 17:36:22 11.19MB Three Dimensional Integrated
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Three-Dimensional Vibration Analysis of Rectangular Thick Plates on Pasternak Foundation with Arbitrary Boundary Conditions
2022-06-08 18:06:04 3.25MB 研究论文
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Three-dimensional design methodologies for tree-based FPGA architecture [Pangracious, V., et al.][Springer,][2015]
2022-03-08 22:25:35 8.87MB FPGA
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Abstract On-chip interconnects are predicted to be a fundamental issue in designing multi-core chip multiprocessors (CMPs) and system-on-chip (SoC) architectures with numerous homogeneous and heterogeneous cores and functional blocks. To mitigate the interconnect crisis, one promising option is network-on-chip (NoC), where a general purpose on-chip interconnection network replaces the traditional design-specific global on-chip wiring by using switching fabrics or routers to connect IP cores or processing elements. Such packet-based communication networks have been gaining wide acceptance due to their scalability and have been proposed for future CMPs and SoC design. In this chapter, we study the combination of both three-dimensional integrated circuits and NoCs, since both are proposed as solutions to mitigate the interconnect scaling challenges. This chapter will start with a brief introduction on network-on-chip architecture and then discuss design space exploration for various network topologies in 3D NoC design, as well as different techniques on 3D on-chip router design. Finally, it describes a design example of using 3D NoC with memory stacked on multi-core CMPs.
2021-12-17 08:14:32 1.48MB Yuan Xie Narayanan Vijaykrishnan
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三维模型分析与处理 Three-Dimensional Model Analysis and Processing 浙江大学& SPringer
2021-09-12 21:13:43 15.29MB 3D 三维模型分析与处理
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