When most system designers look at serializer/deserializer (SerDes) devices, they often
compare speed and power without considering how the SerDes works and what it
actually does with their data. Internal SerDes architecture may seem irrelevant, but this
overlooked item can dictate many important system parameters like system topology,
protocol overhead, data formatting and flow, latency, clocking and timing requirements,
and the need for additional buffering as well as logic. These issues can have a big impact
on system cost, performance, and efficiency.
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