上传者: xyl903481310
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上传时间: 2021-05-04 10:02:07
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文件大小: 605KB
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文件类型: ZIP
---Data Memory (Single-Ported Read/Write memory)---
• Generics
- Data memory size/depth (data_mem_depth with default value of 117 locations)
- Data memory width (data_mem_width with default value of 32 bits)
• Inputs
- Clock (clk -> 1 bit)
- Asynchronous reset (rst -> 1 bit)
- Memory write enable (MemWrite -> 1 bit)
1 -> enable writing to data memory,
0 -> disable writing to data memory
- Address for read/write operand (A -> n_bits_address bits = 32 bits)
- Write Data for write operand (WD -> data_mem_width bits)
• Outputs
- Read Data for read operand (RD -> data_mem_width bits)
• In Vivado
- Create a blank project
- Add design and simulation source files
- Run behavioral simulation
- Your waveform configuration should be identical to the provided waveform snapshot, see Figure 2