[{"title":"( 66 个子文件 320KB ) SHA3-FPGA:FPGA特定的SHA-3实现","children":[{"title":"SHA3-FPGA-main","children":[{"title":"fpga_small","children":[{"title":"chi_iota_row.vhd <span style='color:#111;'> 9.06KB </span>","children":null,"spread":false},{"title":"rho_lane_opt.ucf <span style='color:#111;'> 1.81KB </span>","children":null,"spread":false},{"title":"keccak_fsm_V6.ucf <span style='color:#111;'> 36.98KB </span>","children":null,"spread":false},{"title":"rho_lane_optimized.vhd <span style='color:#111;'> 17.72KB </span>","children":null,"spread":false},{"title":"state_en_mux.vhd <span style='color:#111;'> 8.17KB </span>","children":null,"spread":false},{"title":"theta_row.vhd <span style='color:#111;'> 4.32KB </span>","children":null,"spread":false},{"title":"keccak_fsm_cntrlIncl_199.vhd <span style='color:#111;'> 5.05KB </span>","children":null,"spread":false},{"title":"tb_chi.vhd <span style='color:#111;'> 2.35KB </span>","children":null,"spread":false},{"title":"tb_state_reg.vhd <span style='color:#111;'> 3.94KB </span>","children":null,"spread":false},{"title":"state_plane.vhd <span style='color:#111;'> 7.59KB </span>","children":null,"spread":false},{"title":"final_files","children":[{"title":"chi_iota_row.vhd <span style='color:#111;'> 10.51KB </span>","children":null,"spread":false},{"title":"rho_lane_optimized.vhd <span style='color:#111;'> 23.77KB </span>","children":null,"spread":false},{"title":"theta_row.vhd <span style='color:#111;'> 5.77KB </span>","children":null,"spread":false},{"title":"keccak_fsm.xdc <span style='color:#111;'> 60.58KB </span>","children":null,"spread":false},{"title":"state_plane.vhd <span style='color:#111;'> 9.02KB </span>","children":null,"spread":false},{"title":"state_reg.vhd <span style='color:#111;'> 12.44KB </span>","children":null,"spread":false},{"title":"slice_parity.vhd <span style='color:#111;'> 2.64KB </span>","children":null,"spread":false},{"title":"control.vhd <span style='color:#111;'> 15.70KB </span>","children":null,"spread":false},{"title":"theta_parity_adresses.vhd <span style='color:#111;'> 3.23KB </span>","children":null,"spread":false},{"title":"49SLICES_reportV6.txt <span style='color:#111;'> 33.93KB </span>","children":null,"spread":false},{"title":"keccak_fsm.ucf <span style='color:#111;'> 60.64KB </span>","children":null,"spread":false},{"title":"kecc_globals.vhd <span style='color:#111;'> 2.39KB </span>","children":null,"spread":false},{"title":"keccak_fsm.vhd <span style='color:#111;'> 8.91KB </span>","children":null,"spread":false},{"title":"theta_fpga.vhd <span style='color:#111;'> 8.73KB </span>","children":null,"spread":false}],"spread":false},{"title":"state_reg.vhd <span style='color:#111;'> 11.01KB </span>","children":null,"spread":false},{"title":"keccak_fsm_Spartan6.ucf <span style='color:#111;'> 17.41KB </span>","children":null,"spread":false},{"title":"slice_parity.vhd <span style='color:#111;'> 1.19KB </span>","children":null,"spread":false},{"title":"rho_lane_optimized_Virtex5.vhd <span style='color:#111;'> 21.40KB </span>","children":null,"spread":false},{"title":"rho_lane.vhd <span style='color:#111;'> 2.71KB </span>","children":null,"spread":false},{"title":"keccak_fsm_thetaIncl.vhd <span style='color:#111;'> 7.06KB </span>","children":null,"spread":false},{"title":"final_filesV7.zip <span style='color:#111;'> 24.21KB </span>","children":null,"spread":false},{"title":"tb_control.vhd <span style='color:#111;'> 3.41KB </span>","children":null,"spread":false},{"title":"control.vhd <span style='color:#111;'> 10.63KB </span>","children":null,"spread":false},{"title":"theta_parity_adresses.vhd <span style='color:#111;'> 1.79KB </span>","children":null,"spread":false},{"title":"49SLICES_reportV6.txt <span style='color:#111;'> 33.93KB </span>","children":null,"spread":false},{"title":"comparator.vhd <span style='color:#111;'> 12.67KB </span>","children":null,"spread":false},{"title":"tb_comparator.vhd <span style='color:#111;'> 2.88KB </span>","children":null,"spread":false},{"title":"tb_keccak_fsm.vhd <span style='color:#111;'> 4.75KB </span>","children":null,"spread":false},{"title":"kecc_globals.vhd <span style='color:#111;'> 2.12KB </span>","children":null,"spread":false},{"title":"tb_parity_addresses.vhd <span style='color:#111;'> 2.47KB </span>","children":null,"spread":false},{"title":"keccak_fsm.vhd <span style='color:#111;'> 7.36KB </span>","children":null,"spread":false},{"title":"tb_rho.vhd <span style='color:#111;'> 2.12KB </span>","children":null,"spread":false},{"title":"49SLICES_ucf <span style='color:#111;'> 37.21KB </span>","children":null,"spread":false},{"title":"theta_fpga.vhd <span style='color:#111;'> 6.76KB </span>","children":null,"spread":false}],"spread":false},{"title":"README.md <span style='color:#111;'> 528B </span>","children":null,"spread":false},{"title":"fpga_fast_en","children":[{"title":"keccak_round_constants_gen.vhd <span style='color:#111;'> 7.70KB </span>","children":null,"spread":false},{"title":"chi_iota_row.vhd <span style='color:#111;'> 10.86KB </span>","children":null,"spread":false},{"title":"FULL_REPORT_S6_TP <span style='color:#111;'> 32.61KB </span>","children":null,"spread":false},{"title":"pi.vhd <span style='color:#111;'> 2.62KB </span>","children":null,"spread":false},{"title":"FULL_REPORT_V5_TP <span style='color:#111;'> 52.13KB </span>","children":null,"spread":false},{"title":"top_wrapperV5.ucf <span style='color:#111;'> 659.20KB </span>","children":null,"spread":false},{"title":"Keccak_round_blocks.vhd <span style='color:#111;'> 2.74KB </span>","children":null,"spread":false},{"title":"iota.vhd <span style='color:#111;'> 2.94KB </span>","children":null,"spread":false},{"title":"chi.vhd <span style='color:#111;'> 4.96KB </span>","children":null,"spread":false},{"title":"FULL_REPORT_V6 <span style='color:#111;'> 39.99KB </span>","children":null,"spread":false},{"title":"top_wrapperV7.ucf <span style='color:#111;'> 696.43KB </span>","children":null,"spread":false},{"title":"top_wrapperV6.ucf <span style='color:#111;'> 652.07KB </span>","children":null,"spread":false},{"title":"rho.vhd <span style='color:#111;'> 4.93KB </span>","children":null,"spread":false},{"title":"FULL_REPORT_V6_TP <span style='color:#111;'> 15.25KB </span>","children":null,"spread":false},{"title":"FULL_REPORT_S6 <span style='color:#111;'> 38.89KB </span>","children":null,"spread":false},{"title":"tb_Keccak_f.vhd <span style='color:#111;'> 4.44KB </span>","children":null,"spread":false},{"title":"Keccak_f.vhd <span style='color:#111;'> 6.39KB </span>","children":null,"spread":false},{"title":"top_wrapperS6.ucf <span style='color:#111;'> 708.55KB </span>","children":null,"spread":false},{"title":"teta.vhd <span style='color:#111;'> 8.48KB </span>","children":null,"spread":false},{"title":"top_wrapper.vhd <span style='color:#111;'> 3.69KB </span>","children":null,"spread":false},{"title":"kecc_globals.vhd <span style='color:#111;'> 2.11KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}],"spread":true}]