MIPS单/多周期CPU设计Verilog源码

[{"title":"（ 30 个子文件 168KB ） MIPS单/多周期CPU设计Verilog源码","children":[{"title":"MIPSCPU_Project","children":[{"title":"ALUcontroler.v <span style='color:#111;'> 1.12KB </span>","children":null,"spread":false},{"title":"InstructionData.dat <span style='color:#111;'> 527B </span>","children":null,"spread":false},{"title":"SingleCycleCPU.v <span style='color:#111;'> 3.58KB </span>","children":null,"spread":false},{"title":"work","children":[{"title":"_lib1_53.qpg <span style='color:#111;'> 1.05MB </span>","children":null,"spread":false},{"title":"_vmake <span style='color:#111;'> 29B </span>","children":null,"spread":false},{"title":"_lib1_54.qdb <span style='color:#111;'> 32.00KB </span>","children":null,"spread":false},{"title":"_lib1_54.qpg <span style='color:#111;'> 1.17MB </span>","children":null,"spread":false},{"title":"_lib.qdb <span style='color:#111;'> 48.00KB </span>","children":null,"spread":false},{"title":"_lib1_53.qdb <span style='color:#111;'> 32.00KB </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 4.98KB </span>","children":null,"spread":false}],"spread":true},{"title":"register.v <span style='color:#111;'> 2.57KB </span>","children":null,"spread":false},{"title":"regr.v <span style='color:#111;'> 1.27KB </span>","children":null,"spread":false},{"title":"InstructionMem.v.bak <span style='color:#111;'> 7.21KB </span>","children":null,"spread":false},{"title":"outInfo_pipeline.dat <span style='color:#111;'> 128.97KB </span>","children":null,"spread":false},{"title":"DataMem.v <span style='color:#111;'> 1.50KB </span>","children":null,"spread":false},{"title":"outInfo_single.dat <span style='color:#111;'> 96.65KB </span>","children":null,"spread":false},{"title":"ALU.v <span style='color:#111;'> 1.77KB </span>","children":null,"spread":false},{"title":"FiveStageCPU_tb.v <span style='color:#111;'> 3.55KB </span>","children":null,"spread":false},{"title":"register_single.v <span style='color:#111;'> 2.58KB </span>","children":null,"spread":false},{"title":"SingleCPU_tb.v <span style='color:#111;'> 3.61KB </span>","children":null,"spread":false},{"title":"SignExtend.v <span style='color:#111;'> 381B </span>","children":null,"spread":false},{"title":"vsim.wlf <span style='color:#111;'> 48.00KB </span>","children":null,"spread":false},{"title":"Controler.v <span style='color:#111;'> 2.82KB </span>","children":null,"spread":false},{"title":"InstructionData.dat.bak <span style='color:#111;'> 527B </span>","children":null,"spread":false},{"title":"InstructionMem.v <span style='color:#111;'> 7.22KB </span>","children":null,"spread":false},{"title":"测试说明 <span style='color:#111;'> 998B </span>","children":null,"spread":false},{"title":"imtest.dat <span style='color:#111;'> 98B </span>","children":null,"spread":false},{"title":"MIPSCPU_Project.cr.mti <span style='color:#111;'> 4.67KB </span>","children":null,"spread":false},{"title":"MIPSCPU_Project.mpf <span style='color:#111;'> 88.88KB </span>","children":null,"spread":false},{"title":"FiveStageCPU.v <span style='color:#111;'> 11.42KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]