MCU与FPGA之前SPI通信

[{"title":"（ 88 个子文件 238KB ） MCU与FPGA之前SPI通信","children":[{"title":"06_MCU2FPGA_SPI_Test","children":[{"title":"sim","children":[{"title":"MCU2FPGA_SPI_TB","children":[{"title":"MCU2FPGA_SPI_TB.mpf <span style='color:#111;'> 20.38KB </span>","children":null,"spread":false},{"title":"spi_index","children":[{"title":"spi_receiver.v <span style='color:#111;'> 3.18KB </span>","children":null,"spread":false},{"title":"spi_transfer.v <span style='color:#111;'> 3.48KB </span>","children":null,"spread":false}],"spread":true},{"title":"transcript <span style='color:#111;'> 436B </span>","children":null,"spread":false},{"title":"work","children":[{"title":"@m@c@u2@f@p@g@a_@s@p@i_@t@b","children":[{"title":"verilog.prw <span style='color:#111;'> 1.26KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 1.87KB </span>","children":null,"spread":false},{"title":"_primary.vhd <span style='color:#111;'> 260B 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style='color:#111;'> 993B </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 1.41KB </span>","children":null,"spread":false},{"title":"_primary.vhd <span style='color:#111;'> 420B </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 15.66KB </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 1.84KB </span>","children":null,"spread":false}],"spread":true},{"title":"_info <span style='color:#111;'> 1.97KB </span>","children":null,"spread":false}],"spread":true},{"title":"MCU2FPGA_SPI_TB.cr.mti <span style='color:#111;'> 1.03KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_TB.v <span style='color:#111;'> 4.60KB </span>","children":null,"spread":false},{"title":"vsim.wlf <span style='color:#111;'> 136.00KB </span>","children":null,"spread":false},{"title":"wave.do <span style='color:#111;'> 1.49KB </span>","children":null,"spread":false},{"title":"__Previews","children":[{"title":"MCU2FPGA_SPI_TB.vPreview <span style='color:#111;'> 82.89KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"src","children":[{"title":"SPI_Code4FPGA.v.bak <span style='color:#111;'> 3.30KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.v <span style='color:#111;'> 4.19KB </span>","children":null,"spread":false},{"title":"system_index","children":[{"title":"output_files","children":null,"spread":false},{"title":"sys_pll.qip <span style='color:#111;'> 276B </span>","children":null,"spread":false},{"title":"sys_pll.ppf <span style='color:#111;'> 476B </span>","children":null,"spread":false},{"title":"system_ctrl_pll.v <span style='color:#111;'> 3.15KB </span>","children":null,"spread":false},{"title":"sys_pll.v <span style='color:#111;'> 14.89KB </span>","children":null,"spread":false},{"title":"system_ctrl_pll.v.bak <span style='color:#111;'> 3.92KB </span>","children":null,"spread":false},{"title":"system_ctrl.v <span style='color:#111;'> 2.92KB </span>","children":null,"spread":false},{"title":"system_init_delay.v.bak <span style='color:#111;'> 2.13KB </span>","children":null,"spread":false},{"title":"system_ctrl.v.bak <span style='color:#111;'> 2.90KB </span>","children":null,"spread":false},{"title":"Chain1.cdf <span style='color:#111;'> 367B </span>","children":null,"spread":false},{"title":"system_init_delay.v <span style='color:#111;'> 2.68KB </span>","children":null,"spread":false}],"spread":false},{"title":"spi_receive.v.bak <span style='color:#111;'> 3.21KB </span>","children":null,"spread":false},{"title":"spi_index","children":[{"title":"spi_receiver.v <span style='color:#111;'> 3.93KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.tis_db_list.ddb <span style='color:#111;'> 234B </span>","children":null,"spread":false},{"title":"spi_receiver.v.bak <span style='color:#111;'> 3.18KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.pti_db_list.ddb <span style='color:#111;'> 217B </span>","children":null,"spread":false},{"title":"spi_transfer.v.bak <span style='color:#111;'> 3.48KB </span>","children":null,"spread":false},{"title":"spi_transfer.v <span style='color:#111;'> 4.25KB </span>","children":null,"spread":false}],"spread":true},{"title":"led_display_index","children":[{"title":"led_breathe_display.v <span style='color:#111;'> 4.10KB </span>","children":null,"spread":false},{"title":"led_input_display.v <span style='color:#111;'> 1.90KB </span>","children":null,"spread":false},{"title":"led_water_display.v <span style='color:#111;'> 3.88KB </span>","children":null,"spread":false},{"title":"led_74595_driver.v <span style='color:#111;'> 3.63KB </span>","children":null,"spread":false},{"title":"led_addr_display.v <span style='color:#111;'> 2.28KB </span>","children":null,"spread":false}],"spread":true},{"title":"MCU2FPGA_SPI_Test.v.bak <span style='color:#111;'> 4.08KB </span>","children":null,"spread":false},{"title":"spi_index.rar <span style='color:#111;'> 5.56KB </span>","children":null,"spread":false},{"title":"spi_transfer.v.bak <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false}],"spread":true},{"title":"core","children":null,"spread":false},{"title":"doc","children":[{"title":"SPI_Code4FPGA","children":[{"title":"Project","children":[{"title":"SPI_Code4FPGA.ewp <span style='color:#111;'> 40.84KB </span>","children":null,"spread":false},{"title":"Debug","children":[{"title":"Obj","children":[{"title":"main.o <span style='color:#111;'> 26.43KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.pbd <span style='color:#111;'> 148B </span>","children":null,"spread":false}],"spread":true},{"title":"List","children":null,"spread":false},{"title":"Exe","children":[{"title":"SPI_Code4FPGA.hex <span style='color:#111;'> 1.42KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.out <span style='color:#111;'> 27.91KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"SPI_Code4FPGA.ewd <span style='color:#111;'> 10.72KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.eww <span style='color:#111;'> 167B </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.dep <span style='color:#111;'> 2.26KB </span>","children":null,"spread":false},{"title":"settings","children":[{"title":"SPI_Code4FPGA.cspy.bat <span style='color:#111;'> 1.07KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.dbgdt <span style='color:#111;'> 4.83KB </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.dni <span style='color:#111;'> 783B </span>","children":null,"spread":false},{"title":"SPI_Code4FPGA.wsdt <span style='color:#111;'> 4.33KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"User","children":[{"title":"main.c <span style='color:#111;'> 3.26KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"dev","children":[{"title":"output_files","children":[{"title":"MCU2FPGA_SPI_Test.pin <span style='color:#111;'> 31.83KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.fit.summary <span style='color:#111;'> 637B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.map.smsg <span style='color:#111;'> 160B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.asm.rpt <span style='color:#111;'> 7.44KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.map.rpt <span style='color:#111;'> 94.35KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.jdi <span style='color:#111;'> 236B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.map.summary <span style='color:#111;'> 489B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.sta.rpt <span style='color:#111;'> 661.97KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.fit.smsg <span style='color:#111;'> 703B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.sta.summary <span style='color:#111;'> 3.05KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.flow.rpt <span style='color:#111;'> 7.93KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.fit.rpt <span style='color:#111;'> 177.92KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.sof <span style='color:#111;'> 485.23KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.done <span style='color:#111;'> 26B </span>","children":null,"spread":false}],"spread":false},{"title":"sys_pll.qip <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"PLLJ_PLLSPE_INFO.txt <span style='color:#111;'> 166B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.tcl <span style='color:#111;'> 4.34KB </span>","children":null,"spread":false},{"title":"VIP_System.sdc.bak <span style='color:#111;'> 2.34KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.qws <span style='color:#111;'> 854B </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.qpf <span style='color:#111;'> 1.26KB </span>","children":null,"spread":false},{"title":"VIP_System.sdc <span style='color:#111;'> 2.34KB </span>","children":null,"spread":false},{"title":"MCU2FPGA_SPI_Test.qsf <span style='color:#111;'> 4.32KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}]