[{"title":"( 14 个子文件 14.36MB ) 潘松EDA-VHDL第五版课件","children":[{"title":"TP-6381EDA-VHDL第五版","children":[{"title":"第11章 16位实用CPU创新设计.ppt <span style='color:#111;'> 1.18MB </span>","children":null,"spread":false},{"title":"第4章 时序仿真与硬件实现.ppt <span style='color:#111;'> 1.55MB </span>","children":null,"spread":false},{"title":"第7章 宏功能模块应用.ppt <span style='color:#111;'> 2.35MB </span>","children":null,"spread":false},{"title":"第1章 EDA技术概述.ppt <span style='color:#111;'> 338.50KB </span>","children":null,"spread":false},{"title":"第13章 VHDL补遗.ppt <span style='color:#111;'> 760.50KB </span>","children":null,"spread":false},{"title":"第10章 VHDL有限状态机设计.ppt <span style='color:#111;'> 1.40MB </span>","children":null,"spread":false},{"title":"第9章 VHDL设计优化.ppt <span style='color:#111;'> 953.00KB </span>","children":null,"spread":false},{"title":"第2章 FPGA与CPLD的结果原理.ppt <span style='color:#111;'> 1.09MB </span>","children":null,"spread":false},{"title":"第8章 VHDL设计深入.ppt <span style='color:#111;'> 1.12MB </span>","children":null,"spread":false},{"title":"第5章 时序电路的VHDL设计.ppt <span style='color:#111;'> 718.50KB </span>","children":null,"spread":false},{"title":"第14章 VHDL Test Bench仿真.ppt <span style='color:#111;'> 538.50KB </span>","children":null,"spread":false},{"title":"第6章 Quartus II应用深入.ppt <span style='color:#111;'> 1.82MB </span>","children":null,"spread":false},{"title":"第3章 组合电路的VHDL设计.ppt <span style='color:#111;'> 947.50KB </span>","children":null,"spread":false},{"title":"第12章MCU与FPGA片上系统开发.ppt <span style='color:#111;'> 1.64MB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]