PCI Express规范、协议介绍,最新版(V3.0),设计PCIE板卡的时候找到的资料,有PCIE接口介绍、信号介绍以及电气特性介绍、以及PCIE板卡连接器规范介绍等。
2022-12-19 17:05:56 2.07MB PCIE MINI PCIE
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pcie dma 官方驱动源码
2022-12-13 23:36:57 2.6MB PCIe驱动 DMA驱动 DMAdriver pciedriver
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1. INTRODUCTION............................................................................................................... 46 1.1. A THIRD GENERATION I/O INTERCONNECT ................................................................... 46 1.2. PCI EXPRESS LINK......................................................................................................... 49 1.3. PCI EXPRESS FABRIC TOPOLOGY .................................................................................. 50 1.3.1. Root Complex........................................................................................................ 50 1.3.2. Endpoints .............................................................................................................. 51 1.3.3. Switch .................................................................................................................... 54 1.3.4. Root Complex Event Collector .............................................................................. 55 1.3.5. PCI Express to PCI/PCI-X Bridge........................................................................ 55 1.4. PCI EXPRESS FABRIC TOPOLOGY CONFIGURATION ....................................................... 55 1.5. PCI EXPRESS LAYERING OVERVIEW.............................................................................. 56 1.5.1. Transaction Layer ................................................................................................. 57 1.5.2. Data Link Layer .................................................................................................... 57 1.5.3. Physical Layer ...................................................................................................... 58 1.5.4. Layer Functions and Services............................................................................... 58 TRANSACTION LAYER SPECIFICATION ................................................................. 62 2.1. TRANSACTION LAYER OVERVIEW.................................................................................. 62 2.1.1. Address Spaces, Transaction Types, and Usage................................................... 63 2.1.2. Packet Format Overview ...................................................................................... 65 2.2. TRANSACTION LAYER PROTOCOL - PACKET DEFINITION............................................... 67 2.2.1. Common Packet Header Fields ............................................................................ 67 2.2.2. TLPs with Data Payloads - Rules ......................................................................... 70 2.2.3. TLP Digest Rules .................................................................................................. 74 2.2.4. Routing and Addressing Rules .............................................................................. 74 2.2.5. First/Last DW Byte Enables Rules........................................................................ 78 2.2.6. Transaction Descriptor ......................................................................................... 81 2.2.7. Memory, I/O, and Configuration Request Rules................................................... 87 2.2.8. Message Request Rules ......................................................................................... 94 2.2.9. Completion Rules ................................................................................................ 115 2.2.10. TLP Prefix Rules ................................................................................................. 118 2.3. HANDLING OF RECEIVED TLPS.................................................................................... 123 2.3.1. Request Handling Rules...................................................................................... 126 2.3.2. Completion Handling Rules................................................................................ 138 2.4. TRANSACTION ORDERING ............................................................................................ 142 2.4.1. Transaction Ordering Rules ............................................................................... 142 ......
2022-12-08 17:33:08 10.59MB pcie 4.0 标准
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xilinx pcie ip 英文版资料
2022-12-02 11:00:32 11.17MB xilinx fpga pcie
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'We have always recommended these books to our customers and even our own engineers for developing a better understanding of technologies and specifications. We find the latest PCI Express book from MindShare to have the same content and high quality as all the others.' --Nader Saleh, CEO/President, Catalyst Enterprises, Inc. PCI Express is the third-generation Peripheral Component Inter-connect technology for a wide range of systems and peripheral devices. Incorporating recent advances in high-speed, point-to-point interconnect
2022-12-01 10:14:03 5.74MB Linux PCIE
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基于petalinux+vivado的zcu102 demo板的PS端PCIE接口配置与调试经验,包括vivado设置pcie的ip核和petalinux配置设备树及linux内核/根文件系统,已经相关lspci工具的测试。
2022-12-01 10:02:50 1.59MB linux zynqmp pcie ZCU102
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介绍固态硬盘的架构及pcie接口的一本书。 对于ssd的了解有帮助
2022-11-30 19:35:51 1.12MB pcie ssd
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pg195-pcie-dma
2022-11-30 16:41:40 2.36MB xdma dma pcie xilinx
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PCIE 系统架构及物理层一致性测试
2022-11-29 22:04:46 1.5MB PCIE
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为了实现实时快速传输高分辨率图像,设计了x4通道的PCI Express图像采集系统,应用于显微镜自动对焦成像模块的大数据量传输。采用了Altera公司型号为EP4CGX30CF23C8的FPGA,该芯片内部集成支持链式DMA传输功能的PCIE硬核。利用Jungo公司的Windriver软件实现了链式DMA的上层应用设计。经测试与验证,该系统能很好地完成成像模块图像数据的实时采集并稳定快速地传送到上位机,无掉帧现象,性能稳定。系统适用于显微镜自动对焦的高分辨率图像模块数据采集。
2022-11-28 21:54:47 350KB PCIExpress
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