The PHY Interface for the PCI Express Architecture (PIPE) is intended to enable the
development of functionally equivalent PCI Express PHY's. Such PHY's can be delivered as
discrete IC's or as macrocells for inclusion in ASIC designs. The specification defines a set of
PHY functions which must be incorporated in a PIPE compliant PHY, and it defines a standard
interface between such a PHY and a Media Access Layer (MAC) & Link Layer ASIC. It is not
the intent of this specification to define the internal architecture or design of a compliant PHY
chip or macrocell; The PIPE specification is defined to allow various approaches to be used.
Where possible the PIPE specification references the PCI Express base specification rather than
repeating its content. In case of conflicts, the PCI-Express Base Specification shall supercede the
PIPE spec.
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