// Profile: LTE 20 MHz
// REFCLK_IN: 40.000 MHz
RESET_FPGA
RESET_DUT
BlockWrite 2,6 // Set ADI FPGA SPI to 20Mhz
SPIWrite 3DF,01 // Required for proper operation
ReadPartNumber
SPIWrite 2A6,0E // Enable Master Bias
SPIWrite 2A8,0E // Set Bandgap Trim
REFCLK_Scale 40.000000,1,2 // Sets local vari
1