目录网盘文件永久链接 1 vlan 2生成树 bgp 三层 局域网二层 广域网二层
2022-05-29 19:03:11 301B HCIE-RS
HCIP-RS V2.5 PPT和实验指导手册汇总.zip
2022-05-29 09:04:59 81.3MB 文档资料 HCIP
H12-222与H12-223RS考题.rar 内容新 稳过
2022-05-29 09:03:52 74.04MB H12-222 H12-223
此文件用于双目视觉与IMU标定后的结果对VINS-Fusion进行运行
2022-05-27 19:09:24 8KB 源码软件
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此文件用于双目视觉与IMU标定后的结果对VINS-Fusion进行运行 解决博客可能的跑飞问题: roslaunch realsense2_camera rs_imu_stereo.launch roslaunch vins vins_rviz.launch rosrun vins vins_node src/VINS-Fusion/config/realsense_d435i/realsense_stereo_imu_config_my.yaml
2022-05-27 19:09:24 8KB 源码软件
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++++++++++++++++++++++++++ RS Decoder (31,19,6) v1.1 ++++++++++++++++++++++++++ This project consists of 8 verilog files including a testbench file. The files are: - RSDecoder.v : contains description of top module of the decoder. It combines 5 modules of typical RS Decoder building blocks. - scblock.v : contains description of the SC (Syndrome Computation) block and its submodules. - kesblock.v : KES (Key Equation Solver) block and its submodules. - cseeblock.v : CSEE (Chien Search and Error Evaluator) block and parallel invers multiplier module. CSEE is the only block in the decoder that use invers multiplier to compute error magnitude using Fourney Formula. - controller.v : describes controller module. It consists of 2 FSMs and 2 counters. - fifo_register.v : a FIFO register consists of 31 registers to store received word and a register to synchronize outputted data with CSEE block. - common_modules.v: this file contains basic modules that used by other higher modules. It behaves like a library for the project. - testbench.v : the testbench contains 3 different received word vectors. First received word contains no error symbol. Second word contains 6 error symbols and the last word contains 8 error symbols. Limitations in this version: Despite its high data rates, the decoder has some limitations that must be considered. - It flags decoding failure at the end of outputted word. So, other block outside the decoder cannot differentiate between uncorrected word and corrected word until it receive decoding failure flag at the end of the word. - Decoding failure is detected when degree of error location polynomial and number of its roots is not equal. It means the error location polynomial doesn't have roots in the underlying GF(2^5). To determine the roots, decoder must activate CSEE block first. Hence, decoding failure is detected after all elements in GF(2^5) have been evaluated. - Uncorrectable word still have to be summed with wrong error values. Because decoding failure is detected at the end of word, there is no other mechanism to solve the problem, unless decoder start to output the word after all GF(2^5) elements has been evaluated. Hopefully, in next version, limitations above can be solved. Rudy Dwi Putra rudy.dp@gmail.com
2022-05-27 09:23:34 13KB RS Decoder
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华为HCIA-RS(H12-211) v2.5题库第二部分,有需要可下载,走过路过不要错过,第一部分也在上传中,欢迎下载
2022-05-26 22:07:32 640KB HCIA-RS H12-211
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HCIP-RS V2.5 PPT和实验指导手册汇总.zip
2022-05-26 09:04:32 81.33MB 文档资料 HCIP-RS
基于FPGA的RS-232串口通信控制器设计.pdf
2022-05-22 16:01:45 8.53MB FPGA RS-232 串口通信
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rs码译码的vhdl程序,适合需要的同学们。
2022-05-17 22:44:31 545KB rs vhdl 程序
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