《SystemVerilog for verification》, Springer 2006年7月出版，2008年9月第二版。中文版为《SystemVerilog验证 -- 测试平台编写指南》，科学出版社2009年9月出版。

Effective Functional Verification, 详细讲述功能验证方法。

本标准定义了e功能验证语言。本标准的目的是作为一个权威的 (a)电子语言结构的语法和语义 (b)电子语言与标准仿真语言的相互作用 (b) e语言与标准仿真语言的互动 (c) e语言库。本标准服务于使用e语言进行电子设计功能验证的社区。它提供了一个独立于实施的电子语言的定义，并促进了基于电子语言的设计自动化工具的发展。

Computers are used more and more to provide high-quality and reliable products and services, and to control and optimise production processes. Such computers are often embedded into the products and thus hidden to the human user.

Computers are used more and more to provide high-quality and reliable products and services, and to control and optimise production processes. Such computers are often embedded into the products and thus hidden to the human user. Examples are computer-controlled washing machines or gas burners, electronic control units in cars needed for operating airbags and braking systems, signalling systems for high-speed trains, or robots and automatic transport vehicles in industrial production lines

自己摘录的处理器验证讲得很好的资料，一定让迷茫中的你找到通向光明大道的钥匙！

Intel® Quartus® Prime Standard Edition Handbook Volume 3 Verification.pdf

以太网三速MAC源代码说明2 以太网 , 源代码

SATA硬盘仿真模型。The xilinx GTP is configured as SATA PHY,and 256MB DDR2 memory(Xilinx XAPP859) is HDD storge space. It has been tested ok with SATA Host.Please follows the steps. 1>The following path is necessary. setenv LMC_HOME /export/home/mulary/model setenv LMC_CONFIG $LMC_HOME/data/linux.lmc set path =($path $LMC_HOME/bin) setenv LD_LIBRARY_PATH $LMC_HOME/lib/linux.lib:$LD_LIBRARY_PATH

OWAS ASVS标准