目录 前言...................................................................................................................................................1 关于本手册...............................................................................................................................1 第1 章概述.....................................................................................................................................3 1.1 关于处理器........................................................................................................................3 1.2 处理器的组件....................................................................................................................4 1.2.1 Cortex-M3 的层次和实现的选项...........................................................................5 1.2.2 处理器内核.............................................................................................................6 1.2.3 NVIC ........................................................................................................................7 1.2.4 总线矩阵.................................................................................................................7 1.2.5 FPB...........................................................................................................................8 1.2.6 DWT.........................................................................................................................8 1.2.7 ITM...........................................................................................................................8 1.2.8 MPU .........................................................................................................................8 1.2.9 ETM .........................................................................................................................8 1.2.10 TPIU .......................................................................................................................8 1.2.11 SW/JTAG-DP.........................................................................................................9 1.3 可配置的选项....................................................................................................................9 1.3.1 中断.........................................................................................................................9 1.3.2 MPU .........................................................................................................................9 1.3.3 ETM .........................................................................................................................9 1.4 指令集汇总........................................................................................................................9 第2 章编程模型（programmer's model） ...............................................................................17 2.1 关于编程模型..................................................................................................................17 2.1.1 工作模式...............................................................................................................17 2.1.2 工作状态...............................................................................................................17 2.2 特权访问和用户访问......................................................................................................17 2.2.1 主堆栈和进程堆栈...............................................................................................18 2.3 寄存器..............................................................................................................................18 2.3.1 通用寄存器...........................................................................................................18 2.3.2 特殊用途的程序状态寄存器（xPSR） ..............................................................19 2.4 数据类型..........................................................................................................................22 2.5 存储器格式......................................................................................................................22 2.6 指令集..............................................................................................................................24 第3 章系统控制...........................................................................................................................26 3.1 处理器寄存器汇总..........................................................................................................26 3.1.1 嵌套向量中断控制器的寄存器...........................................................................26 3.1.2 内核调试寄存器...................................................................................................28 3.1.3 系统调试寄存器...................................................................................................28 3.1.4 调试接口的端口寄存器.......................................................................................31 3.1.5 存储器保护单元的寄存器...................................................................................32 3.1.6 跟踪端口接口单元的寄存器...............................................................................32 3.1.7 嵌入式跟踪宏单元的寄存器...............................................................................33 目录 第 4 章存储器映射.......................................................................................................................35 4.1 关于存储器映射..............................................................................................................35 4.2 Bit-banding........................................................................................................................37 4.2.1 直接访问别名区...................................................................................................38 4.2.2 直接访问bit-band 区............................................................................................38 4.3 ROM 存储器表.................................................................................................................39 第5 章异常...................................................................................................................................40 5.1 关于异常模型..................................................................................................................40 5.2 异常类型..........................................................................................................................41 5.3 异常优先级......................................................................................................................42 5.3.1 优先级...................................................................................................................43 5.3.2 优先级分组...........................................................................................................43 5.4 特权和堆栈......................................................................................................................44 5.4.1 堆栈.......................................................................................................................44 5.4.2 特权.......................................................................................................................44 5.5 占先..................................................................................................................................45 5.5.1 堆栈.......................................................................................................................45 5.6 末尾连锁（Tail-chaining）.............................................................................................47 5.7 迟来..................................................................................................................................48 5.8 退出..................................................................................................................................49 5.8.1 异常退出...............................................................................................................49 5.8.2 处理器从ISR 中返回...........................................................................................50 5.9 复位..................................................................................................................................51 5.9.1 向量表和复位.......................................................................................................51 5.9.2 预期的启动顺序（boot up sequence） ...............................................................52 5.10 异常的控制权转移........................................................................................................54 5.11 设置多个堆栈................................................................................................................54 5.12 中止(abort)模型.............................................................................................................56 5.12.1 硬故障.................................................................................................................56 5.12.2 局部故障和升级.................................................................................................56 5.12.3 故障状态寄存器和故障地址寄存器.................................................................58 5.13 激活等级(activation level).............................................................................................59 5.14 流程图............................................................................................................................60 5.14.1 中断处理.............................................................................................................60 5.14.2 占先.....................................................................................................................61 5.14.3 返回.....................................................................................................................62 第6 章时钟和复位.......................................................................................................................64 6.1 Cortex-M3 时钟................................................................................................................64 6.2 Cortex-M3 复位................................................................................................................65 6.3 Cortex-M3 复位方式........................................................................................................65 6.3.1 上电复位...............................................................................................................65 6.3.2 系统复位...............................................................................................................66 6.3.3 JTAG-DP 复位.......................................................................................................67 6.3.4 SW-DP 复位...........................................................................................................67 目录 6.3.5 正常工作...............................................................................................................67 第7 章电源管理...........................................................................................................................68 7.1 电源管理概述..................................................................................................................68 7.2 系统电源管理..................................................................................................................68 7.2.1 SLEEPING.............................................................................................................69 7.2.2 SLEEPDEEP ..........................................................................................................69 第8 章嵌套向量中断控制器.......................................................................................................70 8.1 NVIC 概述........................................................................................................................70 8.2 NVIC 编程器模型............................................................................................................70 8.2.1 NVIC 寄存器映射.................................................................................................70 8.2.2 NVIC 寄存器描述.................................................................................................73 8.3 电平中断与脉冲中断......................................................................................................97 第9 章存储器保护单元...............................................................................................................98 9.1 MPU 概述.........................................................................................................................98 9.2 MPU 编程器模型.............................................................................................................98 9.2.1 MPU 寄存器纵览..................................................................................................98 9.2.2 描述MPU 寄存器................................................................................................99 9.2.3 使用重叠寄存器访问MPU ...............................................................................105 9.2.4 子区域.................................................................................................................105 9.3 MPU 访问权限...............................................................................................................106 9.4 MPU 异常中止...............................................................................................................107 9.5 更新MPU 区域.............................................................................................................107 9.5.1 使用CP15 等效代码更新MPU 区域................................................................107 9.5.2 使用两个或三个字来更新MPU 区域...............................................................108 9.6 中断和更新MPU ..........................................................................................................109 第10 章内核调试.......................................................................................................................110 10.1 关于内核调试..............................................................................................................110 10.1.1 停止模式调试...................................................................................................110 10.1.2 退出内核调试...................................................................................................110 10.2 内核调试寄存器.......................................................................................................... 111 10.2.1 调试停止控制和状态寄存器........................................................................... 111 10.2.2 调试内核选择寄存器.......................................................................................113 10.2.3 调试内核寄存器的数据寄存器.......................................................................114 10.2.4 调试异常和监控控制寄存器...........................................................................115 10.3 内核调试访问实例......................................................................................................117 10.4 在内核调试中使用应用寄存器..................................................................................117 第11 章系统调试.......................................................................................................................118 11.1 关于系统调试..............................................................................................................118 11.2 系统调试访问..............................................................................................................119 11.3 系统调试的编程模型..................................................................................................120 11.4 Flash 修补和断点.........................................................................................................121 11.4.1 FPB 的编程模型................................................................................................121 11.5 数据观察点和跟踪......................................................................................................125 11.5.1 DWT 寄存器总结及描述..................................................................................125 目录 11.6 仪表跟踪宏单元..........................................................................................................135 11.6.1 ITM 寄存器总结和描述....................................................................................135 11.7 AHB 访问端口..............................................................................................................141 11.7.1 AHB-AP 处理类型.............................................................................................141 11.7.2 AHB-AP 寄存器总结和描述.............................................................................141 第12 章调试端口.......................................................................................................................145 12.1 关于调试端口..............................................................................................................145 12.2 JTAG-DP.......................................................................................................................146 12.2.1 扫描链接口.......................................................................................................146 12.2.2 IR 扫描链和IR 指令.........................................................................................148 12.2.3 DR 扫描链和DR 寄存器..................................................................................151 12.3 SW-DP...........................................................................................................................157 12.3.1 时钟...................................................................................................................157 12.3.2 调试接口概述...................................................................................................158 12.3.3 协议操作概述...................................................................................................159 12.3.4 协议描述...........................................................................................................162 12.3.5 传输时序...........................................................................................................169 12.4 调试端口（DP）的通用特性.....................................................................................170 12.4.1 Sticky 标志和DP 错误响应..............................................................................170 12.4.2 读和写错误.......................................................................................................171 12.4.3 溢出检测...........................................................................................................171 12.4.4 协议错误，只用于SW-DP..............................................................................172 12.4.5 推动比较和推动验证操作...............................................................................172 12.5 调试端口的编程模型..................................................................................................174 12.5.1 JTAG-DP 寄存器...............................................................................................174 12.5.2 SW-DP 寄存器...................................................................................................175 12.5.3 调试端口（DP）的寄存器描述......................................................................176 第13 章跟踪端口的接口单元...................................................................................................186 13.1 关于跟踪端口的接口单元..........................................................................................186 13.1.1 TPIU 方框图......................................................................................................186 13.1.2 TPIU 组件..........................................................................................................187 13.1.3 TPIU 输入和输出..............................................................................................188 13.2 TPIU 寄存器.................................................................................................................189 13.2.1 TPIU 寄存器汇总..............................................................................................189 13.2.2 TPIU 寄存器描述..............................................................................................189 第14 章总线接口.......................................................................................................................194 14.1 关于总线接口..............................................................................................................194 14.2 ICode 总线接口............................................................................................................194 14.2.1 分支状态信号...................................................................................................195 14.3 DCode 总线接口...........................................................................................................195 14.3.1 专用...................................................................................................................195 14.3.2 存储器属性.......................................................................................................196 14.4 系统接口......................................................................................................................196 14.4.1 不对齐访问.......................................................................................................196 目录 14.4.2 Bit-band 访问.....................................................................................................196 14.4.3 Flash 修补重新映射..........................................................................................196 14.4.4 独占访问（exclusive access）.........................................................................196 14.4.5 存储器属性.......................................................................................................196 14.4.6 流水线式取指...................................................................................................196 14.5 外部专用外设接口......................................................................................................197 14.6 访问的对齐情况..........................................................................................................197 14.7 横跨区域的不对齐访问..............................................................................................198 14.8 Bit-band 访问................................................................................................................198 14.9 写缓冲区......................................................................................................................199 14.10 存储器属性................................................................................................................199 第15 章嵌入式跟踪宏单元.......................................................................................................200 15.1 ETM 概述.....................................................................................................................200 15.1.1 ETM 框图...........................................................................................................200 15.1.2 ETM 资源...........................................................................................................201 15.2 数据跟踪......................................................................................................................202 15.3 ETM 资源.....................................................................................................................202 15.3.1 周期性同步（periodic synchronization）........................................................202 15.3.2 数据和指令地址比较资源...............................................................................202 15.3.3 FIFO 功能..........................................................................................................203 15.4 跟踪输出......................................................................................................................203 15.5 ETM 结构.....................................................................................................................203 15.5.1 可重新开始的指令...........................................................................................203 15.5.2 异常返回...........................................................................................................203 15.5.3 异常跟踪...........................................................................................................204 15.6 ETM 编程器模型..........................................................................................................205 15.6.1 APB 接口...........................................................................................................205 15.6.2 ETM 寄存器列表...............................................................................................206 15.6.3 描述ETM 寄存器.............................................................................................207 第16 章嵌入式跟踪宏单元的接口...........................................................................................209 16.1 ETM 接口概述.............................................................................................................209 16.2 CPU ETM 接口端口描述.............................................................................................209 16.3 分支状态接口..............................................................................................................210 第17 章指令周期定时...............................................................................................................213 17.1 关于指令周期定时......................................................................................................213 17.2 处理器的指令周期定时..............................................................................................213 17.3 加载/存储（Load-store）执行时序............................................................................216 附录A 信号描述.........................................................................................................................218 A.1 时钟...............................................................................................................................218 A.2 复位...............................................................................................................................218 A.3 杂项...............................................................................................................................218 A.4 中断接口.......................................................................................................................219 A.5 ICode 接口.....................................................................................................................219 A.6 DCode 接口....................................................................................................................220 目录 A.7 系统总线接口...............................................................................................................221 A.8 专用外设总线接口.......................................................................................................221 A.9 ITM 接口........................................................................................................................222 A.10 AHB-AP 接口..............................................................................................................222 A.11 ETM 接口.....................................................................................................................223 A.12 测试接口.....................................................................................................................223 附录B 术语表.............................................................................................................................224 附录 C 周立功公司相关信息.....................................................................................................236

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cortex_m4技术参考手册，对主要学习arm M4核处理器的开发者有很大的作用，如NVIC寄存器的初始化。因为具体的处理器芯片（STM32F437）中是没有NVIC寄存器介绍的

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