[{"title":"( 118 个子文件 845KB ) 基于FPGA的8位数字频率计设计(VHDL)","children":[{"title":"cnt10.vhd.bak <span style='color:#111;'> 705B </span>","children":null,"spread":false},{"title":"freq_8bit.vhd <span style='color:#111;'> 2.02KB </span>","children":null,"spread":false},{"title":"clk_div_1Hz.vhd <span style='color:#111;'> 679B </span>","children":null,"spread":false},{"title":"cnt10.vhd <span style='color:#111;'> 743B </span>","children":null,"spread":false},{"title":"freq_8bit.jdi <span style='color:#111;'> 135B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]