[{"title":"( 23 个子文件 2.2MB ) FPGAUSB电路原理图和PCB文件","children":[{"title":"FPGAUSB电路原理图和PCB文件","children":[{"title":"FPGAUSB PCB ECO 2008-11-2 15-31-18.LOG <span style='color:#111;'> 44.27KB </span>","children":null,"spread":false},{"title":"History","children":[{"title":"FPGAUSB.~(1).SchDoc.Zip <span style='color:#111;'> 158.52KB </span>","children":null,"spread":false},{"title":"FPGAUSB.~(3).SchDoc.Zip <span style='color:#111;'> 158.53KB </span>","children":null,"spread":false},{"title":"FPGAUSB.~(1).PcbDoc.Zip <span style='color:#111;'> 394.33KB </span>","children":null,"spread":false},{"title":"FPGAUSB.~(2).SchDoc.Zip <span style='color:#111;'> 158.22KB </span>","children":null,"spread":false}],"spread":true},{"title":"FPGAUSB元器件.xls <span style='color:#111;'> 20.00KB </span>","children":null,"spread":false},{"title":"FPGA_COM.SchDoc <span style='color:#111;'> 112.00KB </span>","children":null,"spread":false},{"title":"FPGA_SDRAM.SchDoc <span style='color:#111;'> 184.50KB </span>","children":null,"spread":false},{"title":"FPGAUSB.SchDoc <span style='color:#111;'> 1.55MB </span>","children":null,"spread":false},{"title":"FPGAUSB.IntLib <span style='color:#111;'> 49.50KB </span>","children":null,"spread":false},{"title":"FPGA_COM SCH ECO 2008-11-2 14-49-14.LOG <span style='color:#111;'> 876B </span>","children":null,"spread":false},{"title":"FPGAUSB.PcbDoc <span style='color:#111;'> 1.39MB </span>","children":null,"spread":false},{"title":"FPGAUSB.pcbdoc_viewstate <span style='color:#111;'> 1.99KB </span>","children":null,"spread":false},{"title":"FPGAUSB99se.pcb <span style='color:#111;'> 984.89KB </span>","children":null,"spread":false},{"title":"FPGAUSB.PRJPCBStructure <span style='color:#111;'> 1.30KB </span>","children":null,"spread":false},{"title":"FPGAUSB PCB ECO 2008-11-2 19-57-26.LOG <span style='color:#111;'> 16.71KB </span>","children":null,"spread":false},{"title":"Project Outputs for FPGAUSB","children":null,"spread":false},{"title":"FPGAUSB.pdf <span style='color:#111;'> 2.99MB </span>","children":null,"spread":false},{"title":"FPGAUSB_TOP.SchDoc <span style='color:#111;'> 23.00KB </span>","children":null,"spread":false},{"title":"FPGAUSB.PRJPCB <span style='color:#111;'> 29.49KB </span>","children":null,"spread":false},{"title":"FPGAUSB SCH ECO 2008-11-2 14-49-14.LOG <span style='color:#111;'> 3.08KB </span>","children":null,"spread":false},{"title":"FPGA_SDRAM SCH ECO 2008-11-2 14-49-14.LOG <span style='color:#111;'> 1.31KB </span>","children":null,"spread":false},{"title":"ProjectOutputs","children":[{"title":"Design Rule Check - FPGAUSB.html <span style='color:#111;'> 8.35KB </span>","children":null,"spread":false},{"title":"Design Rule Check - FPGAUSB.drc <span style='color:#111;'> 762B </span>","children":null,"spread":false}],"spread":false}],"spread":false}],"spread":true}]