基于Verilog的伪随机序列的发生及曼彻斯特编码

[{"title":"（ 188 个子文件 450KB ） 基于Verilog的伪随机序列的发生及曼彻斯特编码","children":[{"title":"说明.doc <span style='color:#111;'> 42.00KB </span>","children":null,"spread":false},{"title":"代码.txt <span style='color:#111;'> 3.24KB </span>","children":null,"spread":false},{"title":"GuiProjectData_StrTbl <span style='color:#111;'> 395B </span>","children":null,"spread":false},{"title":"GuiProjectData <span style='color:#111;'> 256B </span>","children":null,"spread":false},{"title":"Gc_RvReportViewer-Module-DataFactory-Default_StrTbl <span style='color:#111;'> 10.39KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]