[{"title":"( 85 个子文件 347KB ) fpu_latest.tar.gz","children":[{"title":"fpu","children":[{"title":"tags","children":[{"title":"third_release","children":[{"title":"fcmp","children":[{"title":"verilog","children":[{"title":"fcmp.v <span style='color:#111;'> 6.42KB </span>","children":null,"spread":false}],"spread":true},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 7.30KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"FPU.pdf <span style='color:#111;'> 47.04KB </span>","children":null,"spread":false},{"title":"test_vectors","children":[{"title":"mkall.bat <span style='color:#111;'> 8.72KB </span>","children":null,"spread":false},{"title":"pg-src","children":[{"title":"README <span style='color:#111;'> 492B </span>","children":null,"spread":false},{"title":"fptpg.c <span style='color:#111;'> 21.49KB </span>","children":null,"spread":false}],"spread":true},{"title":"mkall_fcmp.bat <span style='color:#111;'> 300B </span>","children":null,"spread":false},{"title":"pg.exe <span style='color:#111;'> 57.93KB </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 1021B </span>","children":null,"spread":false}],"spread":true},{"title":"verilog","children":[{"title":"post_norm.v <span style='color:#111;'> 23.60KB </span>","children":null,"spread":false},{"title":"pre_norm.v <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"except.v <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"fpu.v <span style='color:#111;'> 17.41KB </span>","children":null,"spread":false},{"title":"pre_norm_fmul.v <span style='color:#111;'> 5.40KB </span>","children":null,"spread":false},{"title":"primitives.v <span style='color:#111;'> 3.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"sel_test.vh <span style='color:#111;'> 22.95KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"INITIALRELEASE","children":[{"title":"FPU.pdf <span style='color:#111;'> 39.54KB </span>","children":null,"spread":false},{"title":"test_vectors","children":[{"title":"mkall.bat <span style='color:#111;'> 4.89KB </span>","children":null,"spread":false},{"title":"pg-src","children":[{"title":"README <span style='color:#111;'> 503B </span>","children":null,"spread":false},{"title":"fptpg.c <span style='color:#111;'> 19.24KB </span>","children":null,"spread":false}],"spread":true},{"title":"pg.exe <span style='color:#111;'> 58.12KB </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 872B </span>","children":null,"spread":false}],"spread":true},{"title":"verilog","children":[{"title":"post_norm.v <span style='color:#111;'> 21.54KB </span>","children":null,"spread":false},{"title":"pre_norm.v <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"except.v <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"fpu.v <span style='color:#111;'> 16.34KB </span>","children":null,"spread":false},{"title":"pre_norm_fmul.v <span style='color:#111;'> 5.40KB </span>","children":null,"spread":false},{"title":"primitives.v <span style='color:#111;'> 3.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 895B </span>","children":null,"spread":false},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 9.23KB </span>","children":null,"spread":false},{"title":"sel_test.vh <span style='color:#111;'> 15.79KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"released","children":[{"title":"FPU.pdf <span style='color:#111;'> 40.47KB </span>","children":null,"spread":false},{"title":"test_vectors","children":[{"title":"mkall.bat <span style='color:#111;'> 8.72KB </span>","children":null,"spread":false},{"title":"pg-src","children":[{"title":"README <span style='color:#111;'> 492B </span>","children":null,"spread":false},{"title":"fptpg.c <span style='color:#111;'> 20.02KB </span>","children":null,"spread":false}],"spread":true},{"title":"pg.exe <span style='color:#111;'> 57.39KB </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 872B </span>","children":null,"spread":false}],"spread":true},{"title":"verilog","children":[{"title":"post_norm.v <span style='color:#111;'> 23.60KB </span>","children":null,"spread":false},{"title":"pre_norm.v <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"except.v <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"fpu.v <span style='color:#111;'> 17.41KB </span>","children":null,"spread":false},{"title":"pre_norm_fmul.v <span style='color:#111;'> 5.40KB </span>","children":null,"spread":false},{"title":"primitives.v <span style='color:#111;'> 3.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 896B </span>","children":null,"spread":false},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"sel_test.vh <span style='color:#111;'> 22.95KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true},{"title":"trunk","children":[{"title":"fcmp","children":[{"title":"verilog","children":[{"title":"fcmp.v <span style='color:#111;'> 6.42KB </span>","children":null,"spread":false}],"spread":true},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 7.30KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"FPU.pdf <span style='color:#111;'> 47.04KB </span>","children":null,"spread":false},{"title":"test_vectors","children":[{"title":"mkall.bat <span style='color:#111;'> 8.72KB </span>","children":null,"spread":false},{"title":"pg-src","children":[{"title":"README <span style='color:#111;'> 492B </span>","children":null,"spread":false},{"title":"fptpg.c <span style='color:#111;'> 21.49KB </span>","children":null,"spread":false}],"spread":true},{"title":"mkall_fcmp.bat <span style='color:#111;'> 300B </span>","children":null,"spread":false},{"title":"pg.exe <span style='color:#111;'> 57.93KB </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 1021B </span>","children":null,"spread":false}],"spread":true},{"title":"verilog","children":[{"title":"post_norm.v <span style='color:#111;'> 23.60KB </span>","children":null,"spread":false},{"title":"pre_norm.v <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"except.v <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"fpu.v <span style='color:#111;'> 17.41KB </span>","children":null,"spread":false},{"title":"pre_norm_fmul.v <span style='color:#111;'> 5.40KB </span>","children":null,"spread":false},{"title":"primitives.v <span style='color:#111;'> 3.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"sel_test.vh <span style='color:#111;'> 22.95KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"web_uploads","children":[{"title":"index.shtml <span style='color:#111;'> 3.66KB </span>","children":null,"spread":false}],"spread":true},{"title":"branches","children":[{"title":"russelmann","children":[{"title":"fcmp","children":[{"title":"verilog","children":[{"title":"fcmp.v <span style='color:#111;'> 6.42KB </span>","children":null,"spread":false}],"spread":true},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 7.30KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"FPU.pdf <span style='color:#111;'> 47.04KB </span>","children":null,"spread":false},{"title":"test_vectors","children":[{"title":"mkall.bat <span style='color:#111;'> 8.72KB </span>","children":null,"spread":false},{"title":"pg-src","children":[{"title":"README <span style='color:#111;'> 492B </span>","children":null,"spread":false},{"title":"fptpg.c <span style='color:#111;'> 21.49KB </span>","children":null,"spread":false}],"spread":true},{"title":"mkall_fcmp.bat <span style='color:#111;'> 300B </span>","children":null,"spread":false},{"title":"pg.exe <span style='color:#111;'> 57.93KB </span>","children":null,"spread":false},{"title":"README <span style='color:#111;'> 1021B </span>","children":null,"spread":false}],"spread":true},{"title":"verilog","children":[{"title":"post_norm.v <span style='color:#111;'> 23.60KB </span>","children":null,"spread":false},{"title":"pre_norm.v <span style='color:#111;'> 9.19KB </span>","children":null,"spread":false},{"title":"except.v <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"fpu.v <span style='color:#111;'> 17.41KB </span>","children":null,"spread":false},{"title":"pre_norm_fmul.v <span style='color:#111;'> 5.40KB </span>","children":null,"spread":false},{"title":"primitives.v <span style='color:#111;'> 3.27KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false},{"title":"test_bench","children":[{"title":"test_top.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"sel_test.vh <span style='color:#111;'> 22.95KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}],"spread":true}],"spread":true}],"spread":true}]