南京理工大学 2018电类综合实验QuartusII设计源文件 基于QuartusII的多功能数字时钟设计

上传者: wsrjc | 上传时间: 2019-12-21 21:57:00 | 文件大小: 333KB | 文件类型: zip
使用qurtusII 9.1设计并下载到SmartSOPC实验系统中。 本实验利用QuartusII软件,结合所学的数字电路的知识,采用自顶向下的分析方法。首先分析了多功能数字钟的设计要求、所需实现的功能,然后分析了实现每个功能所需要的基础模块,最后进一步分析了各种基础模块。在具体设计时,采用的是自底向上的设计方法。首先设计各种基础模块,然后设计各种功能模块,最后进行综合设计。本次设计除了实现基本的时钟电路外,还实现了整点报时、闹钟、日期、星期、秒表等多种功能: 1. 设计一个具有校时、校分,清零,保持和整点报时等功能的数字钟。基于QuartusⅡ软件或其他EDA软件完成电路设计。 2. 对该电路系统采用层次化的方法进行设计,要求设计层次清晰、合理。 3. 完成顶层电路原理图的设计,编写相应功能模块的HDL设计程序。 4. 对该电路系统进行功能仿真。 5. 根据EDA实验开发系统上的FPGA芯片进行适配,生成配置文件或JEDEC文件。 6. 将配置文件或JEDEC文件下载到EDA实验开发系统。 7. 在EDA实验开发系统上调试、验证电路功能。

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