ZYNQ通过PS访问PL端BRAM,与PL进行数据交互,基于BRAM IP 核的(PS端读写+PL端读)控制

上传者: 44852755 | 上传时间: 2023-12-26 19:46:05 | 文件大小: 58.26MB | 文件类型: ZIP
将 Xilinx BMG IP 核配置成一个真双端口的 RAM 并对其进行读写操作。 在PS端通过串口输入数据给BRAM,写操作完成后再把数据读回,在串口打印出来。在PL端把RAM中的数据读出,将其输送给其他模块进行功能选择配置。

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