基于FPGA的出租车计费系统设计(包含项目project,设计文档,电路原理图,仿真图)

上传者: 43796281 | 上传时间: 2024-05-27 10:55:01 | 文件大小: 12.69MB | 文件类型: RAR
课题目标:按行驶里程收费,起步价为6.00元,并在车行3公里后再按2元/公里计算车费; 实现模拟功能:能模拟汽车启动、停止; 主要内容:利用FPGA来实现出租车计费器,使用FPGA来开发数字电路,可以大大缩短设计时间,减少PCB面积,提高系统的可靠性。同时由于FPGA的功能完全取决于VHDL语言编写的程序,不拘泥于某种芯片的特殊指令,更加提高了产品的更新换代能力。出租车计费器系统是VHDL语言的实际应用,利用VHDL语言设计出来的出租车计费器系统将实现计程模块、计时模块以及动态扫描模块等设计方法与技巧。计程模块将用计数器来完成,计数器对脉冲数计数,然后提供给程序数据。通过不同的信号,然后用比较器可以让我们确定出租车是在车行计程还是车停计时。再将数据传输到计费模块,通过多种条件判定,最后确定输出值,然后相加确定最后的费用,并显示出来。

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