[{"title":"( 35 个子文件 88KB ) verilog-i2c:用于 FPGA 实现的 Verilog I2C 接口","children":[{"title":"verilog-i2c-master","children":[{"title":"tb","children":[{"title":"test_i2c_master_wbs_8.v <span style='color:#111;'> 2.92KB </span>","children":null,"spread":false},{"title":"test_i2c_master_wbs_16.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false},{"title":"test_i2c_master.v <span style='color:#111;'> 3.72KB </span>","children":null,"spread":false},{"title":"test_i2c_slave.v <span style='color:#111;'> 3.20KB </span>","children":null,"spread":false},{"title":"test_i2c_master_axil.py <span style='color:#111;'> 12.03KB </span>","children":null,"spread":false},{"title":"test_i2c_master_wbs_16.py <span style='color:#111;'> 9.83KB </span>","children":null,"spread":false},{"title":"wb.py <span style='color:#111;'> 14.99KB </span>","children":null,"spread":false},{"title":"test_i2c_slave_axil_master.v <span style='color:#111;'> 4.07KB </span>","children":null,"spread":false},{"title":"axis_ep.py <span style='color:#111;'> 17.43KB </span>","children":null,"spread":false},{"title":"test_i2c_slave_wbm.py <span style='color:#111;'> 9.35KB </span>","children":null,"spread":false},{"title":"test_i2c_init.py <span style='color:#111;'> 7.42KB </span>","children":null,"spread":false},{"title":"test_i2c_master_wbs_8.py <span style='color:#111;'> 9.68KB </span>","children":null,"spread":false},{"title":"test_i2c_master_axil.v <span style='color:#111;'> 3.98KB </span>","children":null,"spread":false},{"title":"test_i2c.py <span style='color:#111;'> 6.17KB </span>","children":null,"spread":false},{"title":"test_i2c_slave.py <span style='color:#111;'> 8.51KB </span>","children":null,"spread":false},{"title":"test_i2c_master.py <span style='color:#111;'> 11.34KB </span>","children":null,"spread":false},{"title":"axil.py <span style='color:#111;'> 19.21KB </span>","children":null,"spread":false},{"title":"test_i2c_slave_axil_master.py <span style='color:#111;'> 10.76KB </span>","children":null,"spread":false},{"title":"test_i2c_init.v <span style='color:#111;'> 2.73KB </span>","children":null,"spread":false},{"title":"test_i2c_slave_wbm.v <span style='color:#111;'> 3.09KB </span>","children":null,"spread":false},{"title":"i2c.py <span style='color:#111;'> 14.82KB </span>","children":null,"spread":false}],"spread":false},{"title":"rtl","children":[{"title":"i2c_slave.v <span style='color:#111;'> 16.15KB </span>","children":null,"spread":false},{"title":"i2c_master_wbs_16.v <span style='color:#111;'> 23.07KB </span>","children":null,"spread":false},{"title":"i2c_master_axil.v <span style='color:#111;'> 26.94KB </span>","children":null,"spread":false},{"title":"i2c_slave_axil_master.v <span style='color:#111;'> 17.09KB </span>","children":null,"spread":false},{"title":"i2c_master.v <span style='color:#111;'> 29.80KB </span>","children":null,"spread":false},{"title":"axis_fifo.v <span style='color:#111;'> 10.21KB </span>","children":null,"spread":false},{"title":"i2c_slave_wbm.v <span style='color:#111;'> 16.45KB </span>","children":null,"spread":false},{"title":"i2c_init.v <span style='color:#111;'> 16.87KB </span>","children":null,"spread":false},{"title":"i2c_master_wbs_8.v <span style='color:#111;'> 22.36KB </span>","children":null,"spread":false}],"spread":true},{"title":"README <span style='color:#111;'> 9B </span>","children":null,"spread":false},{"title":"AUTHORS <span style='color:#111;'> 40B </span>","children":null,"spread":false},{"title":".gitignore <span style='color:#111;'> 33B </span>","children":null,"spread":false},{"title":"README.md <span style='color:#111;'> 2.32KB </span>","children":null,"spread":false},{"title":"COPYING <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]