数字电路课程CPU设计(verilog完整代码+报告+设计图)

上传者: 37699468 | 上传时间: 2019-12-21 21:37:55 | 文件大小: 6.22MB | 文件类型: zip
cpu
数字电路课程大作业,花了三天写完了一个比较简单版本的(16位二进制命令,8位数据,可实现加减绝对值等多种功能),自主设计CPU自主编写代码,附加英文report,开发环境ISE(课堂上认真做的和抄的分数差不多,所以来这里赚点积分吧,也不荒废做了几天的苦力,本科生可参考)

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