数字水印技术的FPGA实现（Verilog）

[{"title":"（ 61 个子文件 5.3MB ） 数字水印技术的FPGA实现（Verilog）","children":[{"title":"数字水印技术","children":[{"title":"verilog","children":[{"title":"verilog","children":[{"title":"dcfifo_ctrl.v <span style='color:#111;'> 9.36KB </span>","children":null,"spread":false},{"title":"wm_regrw.v~ <span style='color:#111;'> 1.41KB </span>","children":null,"spread":false},{"title":"my_uart_rx.v <span style='color:#111;'> 4.08KB </span>","children":null,"spread":false},{"title":"shifter4x4.v~ <span style='color:#111;'> 8.20KB </span>","children":null,"spread":false},{"title":"shifter4x4.v <span style='color:#111;'> 8.20KB </span>","children":null,"spread":false},{"title":"my_uart_tx.v <span style='color:#111;'> 3.73KB </span>","children":null,"spread":false},{"title":"DWTTOP.v <span style='color:#111;'> 1.92KB </span>","children":null,"spread":false},{"title":"WATERMARK_CALC.v <span style='color:#111;'> 2.22KB </span>","children":null,"spread":false},{"title":"DWTTOP.v~ <span style='color:#111;'> 1.92KB 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