[{"title":"( 164 个子文件 3.12MB ) 西电光通信实验配套资源:系统综合实验+线路编译码工程文件与报告","children":[{"title":"_info <span style='color:#111;'> 1.08KB </span>","children":null,"spread":false},{"title":"_info <span style='color:#111;'> 1010B </span>","children":null,"spread":false},{"title":"_vmake <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"_vmake <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.ammdb <span style='color:#111;'> 279B </span>","children":null,"spread":false},{"title":"test_top.vpr.ammdb <span style='color:#111;'> 260B </span>","children":null,"spread":false},{"title":"test_top.map.ammdb <span style='color:#111;'> 123B </span>","children":null,"spread":false},{"title":"test_top.qsf.bak <span style='color:#111;'> 2.77KB </span>","children":null,"spread":false},{"title":"test_top.v.bak <span style='color:#111;'> 2.26KB </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_tb.v.bak <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak1 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak10 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak11 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak2 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak3 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak4 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak5 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak6 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak7 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak8 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do.bak9 <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"test_top.cmp.bpm <span style='color:#111;'> 559B </span>","children":null,"spread":false},{"title":"test_top.map.bpm <span style='color:#111;'> 527B </span>","children":null,"spread":false},{"title":"test_top.cmp.cdb <span style='color:#111;'> 7.86KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.cdb <span style='color:#111;'> 4.67KB </span>","children":null,"spread":false},{"title":"test_top.(0).cnf.cdb <span style='color:#111;'> 3.80KB </span>","children":null,"spread":false},{"title":"test_top.map.cdb <span style='color:#111;'> 3.77KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.cdb <span style='color:#111;'> 3.62KB </span>","children":null,"spread":false},{"title":"test_top.sgdiff.cdb <span style='color:#111;'> 3.45KB </span>","children":null,"spread":false},{"title":"test_top.rtlv_sg.cdb <span style='color:#111;'> 3.30KB </span>","children":null,"spread":false},{"title":"test_top.map_bb.cdb <span style='color:#111;'> 1.71KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.hbdb.cdb <span style='color:#111;'> 1.26KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.reg_db.cdb <span style='color:#111;'> 199B </span>","children":null,"spread":false},{"title":"test_top.rtlv_sg_swap.cdb <span style='color:#111;'> 181B </span>","children":null,"spread":false},{"title":"test_top_v.sdo_typ.csd <span style='color:#111;'> 5.12KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 23.44KB </span>","children":null,"spread":false},{"title":"logic_util_heursitic.dat <span style='color:#111;'> 2.41KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 1.87KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 546B </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 543B </span>","children":null,"spread":false},{"title":"test_top.db_info <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"test_top.db_info <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 26.07KB </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 1.86KB </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 787B </span>","children":null,"spread":false},{"title":"_primary.dbs <span style='color:#111;'> 787B </span>","children":null,"spread":false},{"title":"test_top.tiscmp.slow_1200mv_0c.ddb <span style='color:#111;'> 106.77KB </span>","children":null,"spread":false},{"title":"test_top.tiscmp.slow_1200mv_85c.ddb <span style='color:#111;'> 106.76KB </span>","children":null,"spread":false},{"title":"test_top.tiscmp.fast_1200mv_0c.ddb <span style='color:#111;'> 106.13KB </span>","children":null,"spread":false},{"title":"test_top.tiscmp.fastest_slow_1200mv_0c.ddb <span style='color:#111;'> 98.91KB </span>","children":null,"spread":false},{"title":"test_top.tiscmp.fastest_slow_1200mv_85c.ddb <span style='color:#111;'> 98.89KB </span>","children":null,"spread":false},{"title":"test_top.asm_labs.ddb <span style='color:#111;'> 16.87KB </span>","children":null,"spread":false},{"title":"test_top.tis_db_list.ddb <span style='color:#111;'> 235B </span>","children":null,"spread":false},{"title":"test_top.pti_db_list.ddb <span style='color:#111;'> 177B </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.dfp <span style='color:#111;'> 33B </span>","children":null,"spread":false},{"title":"test_top_run_msim_rtl_verilog.do <span style='color:#111;'> 548B </span>","children":null,"spread":false},{"title":"test_top_run_msim_gate_verilog.do <span style='color:#111;'> 484B </span>","children":null,"spread":false},{"title":"光通信实验报告打印版.docx <span style='color:#111;'> 1.51MB </span>","children":null,"spread":false},{"title":"test_top.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.dpi <span style='color:#111;'> 659B </span>","children":null,"spread":false},{"title":".gitignore <span style='color:#111;'> 1.16KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.hbdb.hb_info <span style='color:#111;'> 46B </span>","children":null,"spread":false},{"title":"test_top.cmp.hdb <span style='color:#111;'> 11.40KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.hdb <span style='color:#111;'> 10.98KB </span>","children":null,"spread":false},{"title":"test_top.map.hdb <span style='color:#111;'> 10.66KB </span>","children":null,"spread":false},{"title":"test_top.sgdiff.hdb <span style='color:#111;'> 10.64KB </span>","children":null,"spread":false},{"title":"test_top.pre_map.hdb <span style='color:#111;'> 10.55KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.hdb <span style='color:#111;'> 10.54KB </span>","children":null,"spread":false},{"title":"test_top.rtlv.hdb <span style='color:#111;'> 10.48KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.hbdb.hdb <span style='color:#111;'> 10.32KB </span>","children":null,"spread":false},{"title":"test_top.map_bb.hdb <span style='color:#111;'> 8.94KB </span>","children":null,"spread":false},{"title":"test_top.(0).cnf.hdb <span style='color:#111;'> 1.40KB </span>","children":null,"spread":false},{"title":"test_top.hier_info <span style='color:#111;'> 549B </span>","children":null,"spread":false},{"title":"test_top.hif <span style='color:#111;'> 422B </span>","children":null,"spread":false},{"title":"test_top.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd <span style='color:#111;'> 381.76KB </span>","children":null,"spread":false},{"title":"test_top.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd <span style='color:#111;'> 380.81KB </span>","children":null,"spread":false},{"title":"test_top.lpc.html <span style='color:#111;'> 372B </span>","children":null,"spread":false},{"title":"test_top.cmp.idb <span style='color:#111;'> 3.35KB </span>","children":null,"spread":false},{"title":"modelsim.ini <span style='color:#111;'> 10.87KB </span>","children":null,"spread":false},{"title":".inscode <span style='color:#111;'> 144B </span>","children":null,"spread":false},{"title":"test_top.ipinfo <span style='color:#111;'> 163B </span>","children":null,"spread":false},{"title":"test_top.jdi <span style='color:#111;'> 227B </span>","children":null,"spread":false},{"title":"test_top.root_partition.map.kpt <span style='color:#111;'> 677B </span>","children":null,"spread":false},{"title":"test_top.map.kpt <span style='color:#111;'> 673B </span>","children":null,"spread":false},{"title":"test_top.cmp_merge.kpt <span style='color:#111;'> 209B </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.kpt <span style='color:#111;'> 205B </span>","children":null,"spread":false},{"title":"test_top.cmp.kpt <span style='color:#111;'> 204B </span>","children":null,"spread":false},{"title":"test_top.cmp.logdb <span style='color:#111;'> 8.64KB </span>","children":null,"spread":false},{"title":"test_top.root_partition.cmp.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"test_top.map.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"test_top.map_bb.logdb <span style='color:#111;'> 4B </span>","children":null,"spread":false},{"title":"msim_transcript <span style='color:#111;'> 2.13KB </span>","children":null,"spread":false},{"title":"test_top.pin <span style='color:#111;'> 19.96KB </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 1.18KB </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 857B </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 403B </span>","children":null,"spread":false},{"title":"verilog.prw <span style='color:#111;'> 403B </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 126.95KB </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 16.75KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]