SPI接口的verilog实现

[{"title":"（ 131 个子文件 2.5MB ） SPI接口的verilog实现","children":[{"title":"timescale.v <span style='color:#111;'> 23B </span>","children":null,"spread":false},{"title":"spi_defines.v <span style='color:#111;'> 6.15KB </span>","children":null,"spread":false},{"title":"spi_clgen.v <span style='color:#111;'> 4.99KB </span>","children":null,"spread":false},{"title":"spi_top.v <span style='color:#111;'> 12.21KB </span>","children":null,"spread":false},{"title":"spi_shift.v <span style='color:#111;'> 9.22KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]