[{"title":"( 1423 个子文件 6.92MB ) Verilog数字VLSI设计教程光盘资料","children":[{"title":"Verilog_LabCDROM.tar <span style='color:#111;'> 65.35MB </span>","children":null,"spread":false},{"title":"tcbn90ghp_v2001.v <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"ClockedByPLL.spj <span style='color:#111;'> 1.16KB </span>","children":null,"spread":false},{"title":"default.cfg <span style='color:#111;'> 2.09KB </span>","children":null,"spread":false},{"title":"ClockedByPLL.vcs <span style='color:#111;'> 106B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]