sd_verilog

[{"title":"（ 28 个子文件 41KB ） sd_verilog","children":[{"title":"source file","children":[{"title":"wrfifo_inst.v <span style='color:#111;'> 210B </span>","children":null,"spread":false},{"title":"uart_speed_select.v <span style='color:#111;'> 2.01KB </span>","children":null,"spread":false},{"title":"sdram_ctrl.v <span style='color:#111;'> 10.26KB </span>","children":null,"spread":false},{"title":"rdfifo_bb.v <span style='color:#111;'> 5.67KB </span>","children":null,"spread":false},{"title":"sys_ctrl.v <span style='color:#111;'> 2.15KB </span>","children":null,"spread":false},{"title":"PLL_ctrl.v <span style='color:#111;'> 17.45KB </span>","children":null,"spread":false},{"title":"wrfifo.v <span style='color:#111;'> 6.76KB </span>","children":null,"spread":false},{"title":"sd_ctrl.v <span style='color:#111;'> 18.43KB </span>","children":null,"spread":false},{"title":"sdcard_ctrl.v <span style='color:#111;'> 2.20KB </span>","children":null,"spread":false},{"title":"rgb_ram_inst.v <span style='color:#111;'> 140B </span>","children":null,"spread":false},{"title":"uart_tx.v <span style='color:#111;'> 2.58KB </span>","children":null,"spread":false},{"title":"wrfifo_bb.v <span style='color:#111;'> 5.67KB </span>","children":null,"spread":false},{"title":"spi_ctrl.v <span style='color:#111;'> 3.71KB </span>","children":null,"spread":false},{"title":"rdfifo.v <span style='color:#111;'> 6.76KB </span>","children":null,"spread":false},{"title":"sdr_test.v <span style='color:#111;'> 5.63KB </span>","children":null,"spread":false},{"title":"PLL_ctrl_inst.v <span style='color:#111;'> 162B </span>","children":null,"spread":false},{"title":"rgb_ram_bb.v <span style='color:#111;'> 5.55KB </span>","children":null,"spread":false},{"title":"sdram_wr_data.v <span style='color:#111;'> 2.50KB </span>","children":null,"spread":false},{"title":"sdr_para.v <span style='color:#111;'> 3.12KB </span>","children":null,"spread":false},{"title":"rgb_ram.v <span style='color:#111;'> 6.96KB </span>","children":null,"spread":false},{"title":"sdram_top.v <span style='color:#111;'> 4.43KB </span>","children":null,"spread":false},{"title":"uart_ctrl.v <span style='color:#111;'> 1.54KB </span>","children":null,"spread":false},{"title":"sdfifo_ctrl.v <span style='color:#111;'> 7.12KB </span>","children":null,"spread":false},{"title":"vga_ctrl.v <span style='color:#111;'> 3.32KB </span>","children":null,"spread":false},{"title":"sdram_cmd.v <span style='color:#111;'> 5.47KB </span>","children":null,"spread":false},{"title":"sdrsvgaprj.v <span style='color:#111;'> 2.44KB </span>","children":null,"spread":false},{"title":"PLL_ctrl_bb.v <span style='color:#111;'> 13.32KB </span>","children":null,"spread":false},{"title":"rdfifo_inst.v <span style='color:#111;'> 210B </span>","children":null,"spread":false}],"spread":false}],"spread":true}]