基于FPGA的UART接口设计

[{"title":"（ 180 个子文件 2.77MB ） 基于FPGA的UART接口设计","children":[{"title":"uart_top_bitgen.xwbt <span style='color:#111;'> 227B </span>","children":null,"spread":false},{"title":"uart_top_summary.xml <span style='color:#111;'> 409B </span>","children":null,"spread":false},{"title":"uart_top_par.xrpt <span style='color:#111;'> 370.24KB </span>","children":null,"spread":false},{"title":"webtalk.log <span style='color:#111;'> 703B </span>","children":null,"spread":false},{"title":"uart_rx.v <span style='color:#111;'> 2.72KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]