数字IC前端到数字IC后端的synopsysEDA自动化流程脚本
文件下载
资源详情
[{"title":"（ 21 个子文件 1.07MB ） 数字IC前端到数字IC后端的synopsysEDA自动化流程脚本","children":[{"title":"fe2be","children":[{"title":"1.PNG <span style='color:#111;'> 200.19KB </span>","children":null,"spread":false},{"title":"SOC","children":[{"title":"BE","children":[{"title":"output","children":null,"spread":false},{"title":"reports","children":null,"spread":false}],"spread":true},{"title":"DFT","children":[{"title":"db","children":null,"spread":false},{"title":"bak","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"output","children":null,"spread":false},{"title":"lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"scripts","children":null,"spread":false},{"title":"mw","children":[{"title":"tlup","children":null,"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"tf","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"svf","children":null,"spread":false},{"title":"reports","children":null,"spread":false}],"spread":true},{"title":"STA","children":[{"title":"be_db","children":null,"spread":false},{"title":"bak","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"output","children":null,"spread":false},{"title":"syn_db","children":null,"spread":false},{"title":"lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"scripts","children":[{"title":"project.tcl <span style='color:#111;'> 4.01KB </span>","children":null,"spread":false}],"spread":true},{"title":"reports","children":null,"spread":false}],"spread":true},{"title":"Common","children":[{"title":"model","children":null,"spread":false},{"title":"syn_lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"mw_Lib","children":[{"title":"tlup","children":null,"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"tf","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"rtl","children":null,"spread":false},{"title":"scripts","children":[{"title":"custom","children":[{"title":"prj_setup.tcl <span style='color:#111;'> 1.57KB </span>","children":null,"spread":false},{"title":"vlog.txt <span style='color:#111;'> 48B </span>","children":null,"spread":false},{"title":"vhdl.txt <span style='color:#111;'> 18B </span>","children":null,"spread":false}],"spread":true},{"title":"pt_setup.tcl <span style='color:#111;'> 2.08KB </span>","children":null,"spread":false},{"title":"dc_setup.tcl <span style='color:#111;'> 1.26KB </span>","children":null,"spread":false},{"title":"fm_setup.tcl <span style='color:#111;'> 862B </span>","children":null,"spread":false},{"title":"functions.tcl <span style='color:#111;'> 19.40KB </span>","children":null,"spread":false},{"title":"read_rtl.tcl <span style='color:#111;'> 1.51KB </span>","children":null,"spread":false},{"title":"name_rules.tcl <span style='color:#111;'> 1.73KB </span>","children":null,"spread":false},{"title":"dft_setup.tcl <span style='color:#111;'> 1.25KB </span>","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"Synthesis","children":[{"title":"bak","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"output","children":null,"spread":false},{"title":"rtl","children":null,"spread":false},{"title":"lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":true},{"title":"scripts","children":[{"title":"project.tcl <span style='color:#111;'> 6.78KB </span>","children":null,"spread":false},{"title":".project.tcl.swp <span style='color:#111;'> 16.00KB </span>","children":null,"spread":false}],"spread":true},{"title":"mw","children":[{"title":"tlup","children":null,"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"tf","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"svf","children":null,"spread":false},{"title":"reports","children":null,"spread":false}],"spread":true},{"title":"flow <span style='color:#111;'> 4.47KB </span>","children":null,"spread":false},{"title":"Formality","children":[{"title":"be_gate","children":null,"spread":false},{"title":"gate","children":null,"spread":false},{"title":"session","children":null,"spread":false},{"title":"bak","children":null,"spread":false},{"title":"scan_gate","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"rtl","children":null,"spread":false},{"title":"scan_svf","children":null,"spread":false},{"title":"lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"scripts","children":[{"title":"project.tcl <span style='color:#111;'> 5.03KB </span>","children":null,"spread":false},{"title":"config.tcl <span style='color:#111;'> 595B </span>","children":null,"spread":false}],"spread":false},{"title":"svf","children":null,"spread":false},{"title":"reports","children":null,"spread":false}],"spread":false},{"title":"PostSim","children":[{"title":"bak","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"wave","children":null,"spread":false},{"title":"lib","children":null,"spread":false},{"title":"scripts","children":[{"title":"makefile <span style='color:#111;'> 0B </span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"ATPG","children":[{"title":"be_db","children":null,"spread":false},{"title":"model","children":null,"spread":false},{"title":"bak","children":null,"spread":false},{"title":"work","children":null,"spread":false},{"title":"output","children":null,"spread":false},{"title":"lib","children":[{"title":"min","children":[{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"mw","children":[{"title":"tlup","children":null,"spread":false},{"title":"sc","children":null,"spread":false},{"title":"io","children":null,"spread":false},{"title":"tf","children":null,"spread":false},{"title":"macro","children":null,"spread":false},{"title":"ram","children":null,"spread":false}],"spread":false},{"title":"reports","children":null,"spread":false}],"spread":true}],"spread":true},{"title":"3.PNG <span style='color:#111;'> 82.52KB </span>","children":null,"spread":false},{"title":"2.PNG <span style='color:#111;'> 352.00KB </span>","children":null,"spread":false},{"title":"fe2be.pdf <span style='color:#111;'> 463.63KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]
评论信息
其他资源
- 复杂网络度分布图的matlab编程代码
- v4l2 qt实时显示摄像头数据（未使用opencv）
- 基于FusionCompute搭建小型企业私有云实训报告.docx
- Altuim designer MSP430系列原理图和PCB库
- matlab圆心、半径检测
- Matlab有限元编程
- 实现学生信息管理系统
- 组合数学课后答案 清华大学第四版
- c++实现merkle_tree
- Oracle 9i 11g历史库升级迁移数据至19c CDB.docx
- sap hana的jdbc驱动包
- 具有瞬时可能移动位置模型的低信噪比下的目标跟踪
- 剪贴板管理器(clipx)下载 v1.0.3.9g中文版 64位 加三个插件
- Dm7JdbcDriver18.jar
- YUVDroidTool.apk
- 编程词典用户管理系统
- Pt100温度报警 电路图程序
免责申明
【只为小站】的资源来自网友分享，仅供学习研究，请务必在下载后24小时内给予删除，不得用于其他任何用途，否则后果自负。基于互联网的特殊性，【只为小站】 无法对用户传输的作品、信息、内容的权属或合法性、合规性、真实性、科学性、完整权、有效性等进行实质审查；无论 【只为小站】 经营者是否已进行审查，用户均应自行承担因其传输的作品、信息、内容而可能或已经产生的侵权或权属纠纷等法律责任。
本站所有资源不代表本站的观点或立场，基于网友分享，根据中国法律《信息网络传播权保护条例》第二十二条之规定，若资源存在侵权或相关问题请联系本站客服人员，zhiweidada#qq.com，请把#换成@，本站将给予最大的支持与配合，做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明
本站所有资源不代表本站的观点或立场，基于网友分享，根据中国法律《信息网络传播权保护条例》第二十二条之规定，若资源存在侵权或相关问题请联系本站客服人员，zhiweidada#qq.com，请把#换成@，本站将给予最大的支持与配合，做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明