fpga modbus slave

[{"title":"（ 13 个子文件 14KB ） fpga modbus slave","children":[{"title":"modbus_rtu_slave","children":[{"title":"modbus_slave_test.v <span style='color:#111;'> 3.77KB </span>","children":null,"spread":false},{"title":"mod_common_fifo.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false},{"title":"mod_modbus_crc.v <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false},{"title":"modbus_slave_analys.v <span style='color:#111;'> 15.95KB </span>","children":null,"spread":false},{"title":"modbus_slave_top.v <span style='color:#111;'> 6.26KB </span>","children":null,"spread":false},{"title":"uart","children":[{"title":"uart_tx.v <span style='color:#111;'> 2.63KB </span>","children":null,"spread":false},{"title":"uart_rx.v <span style='color:#111;'> 3.50KB </span>","children":null,"spread":false},{"title":"baud_gen.v <span style='color:#111;'> 1.87KB </span>","children":null,"spread":false},{"title":"uart_top.v <span style='color:#111;'> 2.46KB </span>","children":null,"spread":false},{"title":"uart_fifo_top.v <span style='color:#111;'> 4.59KB </span>","children":null,"spread":false}],"spread":true},{"title":"modbus_slave_define.v <span style='color:#111;'> 399B </span>","children":null,"spread":false},{"title":"modbus_slave_pack.v <span style='color:#111;'> 9.39KB </span>","children":null,"spread":false},{"title":"mod_dual_port_ram.v <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false}],"spread":true}],"spread":true}]