FPGA_UART_IP核

上传者: shenshunxiao | 上传时间: 2021-04-08 17:17:20 | 文件大小: 1.98MB | 文件类型: RAR
里面包含程序,还有PDF文档说明……资料不过,共享给各位爱好者

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[{"title":"( 84 个子文件 1.98MB ) FPGA_UART_IP核","children":[{"title":"UART的FPGA实现过程-附完整的FPGA,ModelSim,MCU代码和工程,以及实现文档","children":[{"title":"fpga","children":[{"title":"V0p10","children":[{"title":"uart.cdf <span style='color:#111;'> 324B </span>","children":null,"spread":false},{"title":"uart.qpf <span style='color:#111;'> 905B </span>","children":null,"spread":false},{"title":"uart.fit.smsg <span style='color:#111;'> 411B </span>","children":null,"spread":false},{"title":"uart.tan.summary <span style='color:#111;'> 1.69KB </span>","children":null,"spread":false},{"title":"src","children":[{"title":"divider.v <span style='color:#111;'> 2.69KB </span>","children":null,"spread":false},{"title":"rxd.v <span style='color:#111;'> 12.14KB </span>","children":null,"spread":false},{"title":"ebi.v <span style='color:#111;'> 3.08KB </span>","children":null,"spread":false},{"title":"uart.v <span style='color:#111;'> 13.63KB </span>","children":null,"spread":false},{"title":"top.v <span style='color:#111;'> 2.88KB </span>","children":null,"spread":false},{"title":"txd.v <span style='color:#111;'> 11.31KB </span>","children":null,"spread":false}],"spread":true},{"title":"top.bsf <span style='color:#111;'> 3.19KB </span>","children":null,"spread":false},{"title":"uart.map.smsg <span style='color:#111;'> 99B </span>","children":null,"spread":false},{"title":"db","children":null,"spread":false},{"title":"uart.pin <span style='color:#111;'> 19.99KB </span>","children":null,"spread":false},{"title":"uart.qsf <span style='color:#111;'> 3.51KB </span>","children":null,"spread":false},{"title":"uart.dpf <span style='color:#111;'> 239B </span>","children":null,"spread":false},{"title":"uart.fit.summary <span style='color:#111;'> 400B </span>","children":null,"spread":false},{"title":"uart.qws <span style='color:#111;'> 601B </span>","children":null,"spread":false},{"title":"uart.tan.rpt <span style='color:#111;'> 164.38KB </span>","children":null,"spread":false},{"title":"uart.fit.rpt <span style='color:#111;'> 88.39KB </span>","children":null,"spread":false},{"title":"uart_description.txt <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"testbench","children":[{"title":"transcript <span style='color:#111;'> 460B </span>","children":null,"spread":false},{"title":"uart.cr.mti <span style='color:#111;'> 3.25KB </span>","children":null,"spread":false},{"title":"vsim_stacktrace.vstf <span style='color:#111;'> 2.53KB </span>","children":null,"spread":false},{"title":"ModelSim.jpg <span style='color:#111;'> 155.05KB </span>","children":null,"spread":false},{"title":"vish_stacktrace.vstf <span style='color:#111;'> 1.23KB </span>","children":null,"spread":false},{"title":"tcl_stacktrace.txt <span style='color:#111;'> 2.14KB </span>","children":null,"spread":false},{"title":"cycloneII_v","children":[{"title":"_info <span style='color:#111;'> 82B </span>","children":null,"spread":false}],"spread":false},{"title":"vsim.wlf <span style='color:#111;'> 40.00KB </span>","children":null,"spread":false},{"title":"work","children":[{"title":"ebi","children":[{"title":"_primary.vhd <span style='color:#111;'> 608B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 6.80KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 872B </span>","children":null,"spread":false}],"spread":false},{"title":"uart","children":[{"title":"_primary.vhd <span style='color:#111;'> 1.93KB </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 61.06KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 5.81KB </span>","children":null,"spread":false}],"spread":false},{"title":"divider","children":[{"title":"_primary.vhd <span style='color:#111;'> 325B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 4.84KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 694B </span>","children":null,"spread":false}],"spread":false},{"title":"top_tb","children":[{"title":"_primary.vhd <span style='color:#111;'> 1.46KB </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 184.01KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 12.31KB </span>","children":null,"spread":false}],"spread":false},{"title":"_info <span style='color:#111;'> 1.73KB </span>","children":null,"spread":false},{"title":"rxd","children":[{"title":"_primary.vhd <span style='color:#111;'> 909B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 32.64KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 4.12KB </span>","children":null,"spread":false}],"spread":false},{"title":"_temp","children":null,"spread":false},{"title":"top","children":[{"title":"_primary.vhd <span style='color:#111;'> 593B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 6.97KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 1.20KB </span>","children":null,"spread":false}],"spread":false},{"title":"division","children":[{"title":"_primary.vhd <span style='color:#111;'> 327B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 4.84KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 697B </span>","children":null,"spread":false}],"spread":false},{"title":"txd","children":[{"title":"_primary.vhd <span style='color:#111;'> 932B </span>","children":null,"spread":false},{"title":"verilog.asm <span style='color:#111;'> 26.44KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 3.67KB </span>","children":null,"spread":false}],"spread":false}],"spread":false},{"title":"uart.mpf <span style='color:#111;'> 32.67KB </span>","children":null,"spread":false},{"title":"top_tb.v <span style='color:#111;'> 23.45KB </span>","children":null,"spread":false}],"spread":false},{"title":"uart.asm.rpt <span style='color:#111;'> 8.03KB </span>","children":null,"spread":false},{"title":"uart.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"uart.map.summary <span style='color:#111;'> 403B </span>","children":null,"spread":false},{"title":"uart.sof <span style='color:#111;'> 72.34KB </span>","children":null,"spread":false},{"title":"uart.map.rpt <span style='color:#111;'> 42.11KB </span>","children":null,"spread":false},{"title":"uart.flow.rpt <span style='color:#111;'> 5.02KB </span>","children":null,"spread":false},{"title":"uart.pof <span style='color:#111;'> 128.18KB </span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"创造力电子开发网","children":[{"title":"首页-创造力电子开发网.url <span style='color:#111;'> 45B </span>","children":null,"spread":false},{"title":"登录-创造力电子开发网.url <span style='color:#111;'> 54B </span>","children":null,"spread":false},{"title":"注册-创造力电子开发网.url <span style='color:#111;'> 57B </span>","children":null,"spread":false}],"spread":true},{"title":"创造力电子开发网.url <span style='color:#111;'> 45B </span>","children":null,"spread":false},{"title":"Mcu","children":[{"title":"UartTest","children":[{"title":"UartTest.ewd <span style='color:#111;'> 42.06KB </span>","children":null,"spread":false},{"title":"settings","children":[{"title":"test.cspy.bat <span style='color:#111;'> 2.35KB </span>","children":null,"spread":false},{"title":"UartTest.cspy.bat <span style='color:#111;'> 2.35KB </span>","children":null,"spread":false},{"title":"UartTest.dni <span style='color:#111;'> 398B </span>","children":null,"spread":false},{"title":"test.wsdt <span style='color:#111;'> 4.41KB </span>","children":null,"spread":false},{"title":"test.dni <span style='color:#111;'> 492B </span>","children":null,"spread":false},{"title":"UartTest.wsdt <span style='color:#111;'> 3.93KB </span>","children":null,"spread":false},{"title":"test.dbgdt <span style='color:#111;'> 7.09KB </span>","children":null,"spread":false}],"spread":true},{"title":"UartTest.dep <span style='color:#111;'> 2.74KB </span>","children":null,"spread":false},{"title":"UartTest.eww <span style='color:#111;'> 162B </span>","children":null,"spread":false},{"title":"Debug","children":[{"title":"List","children":null,"spread":false},{"title":"Obj","children":null,"spread":false},{"title":"Exe","children":null,"spread":false}],"spread":true},{"title":"stdinc.h <span style='color:#111;'> 277B </span>","children":null,"spread":false},{"title":"FpgaInc.h <span style='color:#111;'> 928B </span>","children":null,"spread":false},{"title":"UartTest.ewp <span style='color:#111;'> 49.68KB </span>","children":null,"spread":false},{"title":"UartCtrl.h <span style='color:#111;'> 772B </span>","children":null,"spread":false},{"title":"main.c <span style='color:#111;'> 605B </span>","children":null,"spread":false},{"title":"UartCtrl.c <span style='color:#111;'> 1.91KB </span>","children":null,"spread":false}],"spread":false}],"spread":true},{"title":"UART设计文档.pdf <span style='color:#111;'> 1.86MB </span>","children":null,"spread":false},{"title":"读我.txt <span style='color:#111;'> 439B </span>","children":null,"spread":false}],"spread":true}],"spread":true}]

评论信息

  • spp1989 :
    资源不错,感谢楼主无私分享 谢谢!!!
    2016-04-25
  • acelog :
    资源不错,感谢楼主无私分享
    2014-05-29
  • wy915 :
    很好,借鉴其中的一部分,感觉如果把模块分的更小些,运用起来会更方便
    2013-12-09
  • sdfs2df22 :
    很不错的代码,可以借鉴
    2013-12-09
  • huairengui :
    还不错,实用 很早之前下载的 一直忘记评价了 现在补上
    2013-10-24
  • pigyyf :
    不错,不过对我没用
    2013-09-12
  • wwqqss07 :
    不错,注释听多的!!
    2013-09-04
  • xiaojl1234 :
    还不错,就是对于我来说太复杂了
    2013-08-09
  • jinmaoda888 :
    注释很多很容易上手。
    2013-05-04
  • an_de :
    不错,值得学习,就是借口方面的介绍再详尽些就更好了
    2013-04-15

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