基于FPGA的PCIE-XDMA的使用方法（包含工程源码）

[{"title":"（ 602 个子文件 112.49MB ） 基于FPGA的PCIE-XDMA的使用方法（包含工程源码）","children":[{"title":"xsim_run.bat <span style='color:#111;'> 3.32KB </span>","children":null,"spread":false},{"title":"pcie_system.bd <span style='color:#111;'> 69.95KB </span>","children":null,"spread":false},{"title":"pcie_system.bxml <span style='color:#111;'> 12.13KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0.dcp <span style='color:#111;'> 9.94MB </span>","children":null,"spread":false},{"title":"pcie_system_mig_7series_0_0.dcp <span style='color:#111;'> 5.98MB </span>","children":null,"spread":false},{"title":"pcie_system_axi_hwicap_ctrl_0_0.dcp <span style='color:#111;'> 1.80MB </span>","children":null,"spread":false},{"title":"pcie_system_auto_us_cc_df_0.dcp <span style='color:#111;'> 1.35MB </span>","children":null,"spread":false},{"title":"pcie_system_auto_us_df_0.dcp <span style='color:#111;'> 1.03MB </span>","children":null,"spread":false},{"title":"pcie_system_xbar_0.dcp <span style='color:#111;'> 1008.99KB </span>","children":null,"spread":false},{"title":"ila_debug.dcp <span style='color:#111;'> 954.37KB </span>","children":null,"spread":false},{"title":"pcie_system_data_opreate_top_0_0.dcp <span style='color:#111;'> 487.37KB </span>","children":null,"spread":false},{"title":"pcie_system_s00_regslice_0.dcp <span style='color:#111;'> 195.30KB </span>","children":null,"spread":false},{"title":"pcie_system_axi_bram_ctrl_0_0.dcp <span style='color:#111;'> 122.96KB </span>","children":null,"spread":false},{"title":"pcie_system_auto_cc_0.dcp <span style='color:#111;'> 103.29KB </span>","children":null,"spread":false},{"title":"pcie_system_xbar_1.dcp <span style='color:#111;'> 96.00KB </span>","children":null,"spread":false},{"title":"pcie_system_s01_regslice_0.dcp <span style='color:#111;'> 88.99KB </span>","children":null,"spread":false},{"title":"pcie_system_blk_mem_gen_0_0.dcp <span style='color:#111;'> 49.56KB </span>","children":null,"spread":false},{"title":"pcie_system_myip_s00_axi_0_0.dcp <span style='color:#111;'> 36.98KB </span>","children":null,"spread":false},{"title":"pcie_system_auto_pc_0.dcp <span style='color:#111;'> 28.62KB </span>","children":null,"spread":false},{"title":"pcie_system_proc_sys_reset_0_0.dcp <span style='color:#111;'> 20.77KB </span>","children":null,"spread":false},{"title":"clk_pll_wiz.dcp <span style='color:#111;'> 9.69KB </span>","children":null,"spread":false},{"title":"pcie_system_util_vector_logic_0_0.dcp <span style='color:#111;'> 5.31KB </span>","children":null,"spread":false},{"title":"sim.do <span style='color:#111;'> 7.17KB </span>","children":null,"spread":false},{"title":"pcie_system_xlconstant_0_0.h <span style='color:#111;'> 2.62KB </span>","children":null,"spread":false},{"title":"pcie_system_xlconstant_0_1.h <span style='color:#111;'> 2.62KB </span>","children":null,"spread":false},{"title":"pcie_system_xlconstant_1_0.h <span style='color:#111;'> 2.62KB </span>","children":null,"spread":false},{"title":"xlconstant_v1_1_5.h <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false},{"title":"xlconstant_v1_1_5.h <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false},{"title":"xlconstant_v1_1_5.h <span style='color:#111;'> 2.56KB </span>","children":null,"spread":false},{"title":"pcie_system.hwdef <span style='color:#111;'> 47.74KB </span>","children":null,"spread":false},{"title":"pcie_system.hwh <span style='color:#111;'> 356.19KB </span>","children":null,"spread":false},{"title":"xil_txt.in <span style='color:#111;'> 1.43KB </span>","children":null,"spread":false},{"title":"xil_txt.out <span style='color:#111;'> 203B </span>","children":null,"spread":false},{"title":"xsim_files.prj <span style='color:#111;'> 21.64KB </span>","children":null,"spread":false},{"title":"mig_a.prj <span style='color:#111;'> 16.43KB </span>","children":null,"spread":false},{"title":"mig.prj <span style='color:#111;'> 16.22KB </span>","children":null,"spread":false},{"title":"pcie_system.protoinst <span style='color:#111;'> 67.21KB </span>","children":null,"spread":false},{"title":"ies_run.sh <span style='color:#111;'> 5.96KB </span>","children":null,"spread":false},{"title":"vcs_run.sh <span style='color:#111;'> 5.61KB </span>","children":null,"spread":false},{"title":"xdma_v4_1_vl_rfs.sv <span style='color:#111;'> 2.95MB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_core_top.sv <span style='color:#111;'> 239.36KB </span>","children":null,"spread":false},{"title":"ddr3_model.sv <span style='color:#111;'> 166.16KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_pcie2_to_pcie3_wrapper.sv <span style='color:#111;'> 62.15KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_cfg_sideband.sv <span style='color:#111;'> 41.11KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_tgt_req.sv <span style='color:#111;'> 35.91KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_dma_req.sv <span style='color:#111;'> 35.23KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_dma_cpl.sv <span style='color:#111;'> 26.90KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_axi_stream_intf.sv <span style='color:#111;'> 21.27KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_tgt_cpl.sv <span style='color:#111;'> 20.67KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_rx_demux.sv <span style='color:#111;'> 15.26KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_dma_bram_wrap.sv <span style='color:#111;'> 11.73KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_tx_mux.sv <span style='color:#111;'> 11.04KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_rx_destraddler.sv <span style='color:#111;'> 10.65KB </span>","children":null,"spread":false},{"title":"dma_defines.svh <span style='color:#111;'> 12.04KB </span>","children":null,"spread":false},{"title":"dma_pcie_misc_output_if.svh <span style='color:#111;'> 5.48KB </span>","children":null,"spread":false},{"title":"dma_pcie_misc_input_if.svh <span style='color:#111;'> 4.79KB </span>","children":null,"spread":false},{"title":"pcie_dma_attr_defines.svh <span style='color:#111;'> 2.09KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_dsc_cpld_if.svh <span style='color:#111;'> 1.84KB </span>","children":null,"spread":false},{"title":"dma_pcie_fabric_output_if.svh <span style='color:#111;'> 1.64KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_64Bx256_32Bwe_ram_if.svh <span style='color:#111;'> 1.35KB </span>","children":null,"spread":false},{"title":"dma_pcie_c2h_crdt_if.svh <span style='color:#111;'> 1.29KB </span>","children":null,"spread":false},{"title":"dma_pcie_h2c_crdt_if.svh <span style='color:#111;'> 1.29KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_64Bx512_32Bwe_ram_if.svh <span style='color:#111;'> 1.29KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_64Bx128_32Bwe_ram_if.svh <span style='color:#111;'> 1.29KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_16Bx2048_4Bwe_ram_if.svh <span style='color:#111;'> 1.19KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_dsc_cpli_if.svh <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_8Bx2048_4Bwe_ram_if.svh <span style='color:#111;'> 1.15KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_4Bx2048_4Bwe_ram_if.svh <span style='color:#111;'> 1.13KB </span>","children":null,"spread":false},{"title":"dma_pcie_mi_2Bx2048_ram_if.svh <span style='color:#111;'> 1.07KB </span>","children":null,"spread":false},{"title":"dma_pcie_axis_rc_if.svh <span style='color:#111;'> 852B </span>","children":null,"spread":false},{"title":"dma_pcie_axis_cq_if.svh <span style='color:#111;'> 849B </span>","children":null,"spread":false},{"title":"dma_pcie_axis_cc_if.svh <span style='color:#111;'> 816B </span>","children":null,"spread":false},{"title":"dma_pcie_axis_rq_if.svh <span style='color:#111;'> 813B </span>","children":null,"spread":false},{"title":"dma_pcie_fabric_input_if.svh <span style='color:#111;'> 697B </span>","children":null,"spread":false},{"title":"dma_pcie_dsc_out_if.svh <span style='color:#111;'> 435B </span>","children":null,"spread":false},{"title":"dma_pcie_dsc_in_if.svh <span style='color:#111;'> 306B </span>","children":null,"spread":false},{"title":"dma_pcie_gic_if.svh <span style='color:#111;'> 220B </span>","children":null,"spread":false},{"title":"pcie_system_bd.tcl <span style='color:#111;'> 42.67KB </span>","children":null,"spread":false},{"title":"pcie_system_mig_7series_0_0_xmdf.tcl <span style='color:#111;'> 25.77KB </span>","children":null,"spread":false},{"title":"xsim_options.tcl <span style='color:#111;'> 3.19KB </span>","children":null,"spread":false},{"title":"data_opreate_top_v1_0.tcl <span style='color:#111;'> 3.16KB </span>","children":null,"spread":false},{"title":"myip_s00_axi_v1_0.tcl <span style='color:#111;'> 1.70KB </span>","children":null,"spread":false},{"title":"axi_hwicap_ctrl_v1_0.tcl <span style='color:#111;'> 205B </span>","children":null,"spread":false},{"title":"pcie_rd_ctrl_v1_0.tcl <span style='color:#111;'> 205B </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 9.92KB </span>","children":null,"spread":false},{"title":"datasheet.txt <span style='color:#111;'> 3.06KB </span>","children":null,"spread":false},{"title":"readme.txt <span style='color:#111;'> 860B </span>","children":null,"spread":false},{"title":"phy_only_support_readme.txt <span style='color:#111;'> 610B </span>","children":null,"spread":false},{"title":"README.txt <span style='color:#111;'> 130B </span>","children":null,"spread":false},{"title":"sys_clk_gen_ps_v.txt <span style='color:#111;'> 83B </span>","children":null,"spread":false},{"title":"bd_b8ff2fff.ui <span style='color:#111;'> 4.75KB </span>","children":null,"spread":false},{"title":"pcie_system_xdma_0_0_sim_netlist.v <span style='color:#111;'> 18.07MB </span>","children":null,"spread":false},{"title":"pcie_system_mig_7series_0_0_sim_netlist.v <span style='color:#111;'> 13.19MB </span>","children":null,"spread":false},{"title":"pcie_system_axi_hwicap_ctrl_0_0_sim_netlist.v <span style='color:#111;'> 3.56MB </span>","children":null,"spread":false},{"title":"pcie_system_auto_us_cc_df_0_sim_netlist.v <span style='color:#111;'> 2.11MB </span>","children":null,"spread":false},{"title":"ila_debug_sim_netlist.v <span style='color:#111;'> 2.05MB </span>","children":null,"spread":false},{"title":"pcie_system_auto_us_df_0_sim_netlist.v <span style='color:#111;'> 1.60MB </span>","children":null,"spread":false},{"title":"pcie_system_xbar_0_sim_netlist.v <span style='color:#111;'> 1001.00KB </span>","children":null,"spread":false},{"title":"pcie_system_data_opreate_top_0_0_sim_netlist.v <span style='color:#111;'> 868.73KB </span>","children":null,"spread":false},{"title":"xsdbm_v3_0_vl_rfs.v <span style='color:#111;'> 660.42KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]