上传者: 27595745
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上传时间: 2021-08-21 09:38:06
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文件大小: 183KB
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文件类型: PDF
VHDL Quartus AD转换源代码
--ADC0809
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
ENTITY ADC0809 IS ---------实体说明
PORT(
CLK,INT:IN STD_LOGIC;
INADDATA:IN STD_LOGIC_VECTOR(7 DOWNTO 0);
OUTADDATA:OUT STD_LOGIC_VECTOR(7 DOWNTO 0);
CS,WR,RD:OUT STD_LOGIC
);
END ADC0809;
ARCHITECTURE ADC_ARCH OF ADC0809 IS