[{"title":"( 16 个子文件 27KB ) 基于SDRAM建立FIFO","children":[{"title":"FIFO","children":[{"title":"dual_port_1024RAM_bb.v <span style='color:#111;'> 7.89KB </span>","children":null,"spread":false},{"title":"FIFO.v <span style='color:#111;'> 3.97KB </span>","children":null,"spread":false},{"title":"FIFO.qpf <span style='color:#111;'> 1.23KB </span>","children":null,"spread":false},{"title":"data_generate.v <span style='color:#111;'> 2.44KB </span>","children":null,"spread":false},{"title":"dual_port_512RAM_bb.v <span style='color:#111;'> 7.87KB </span>","children":null,"spread":false},{"title":"pll_125Mhz.v <span style='color:#111;'> 14.85KB </span>","children":null,"spread":false},{"title":"PLL_125Mhz_bb.v <span style='color:#111;'> 10.95KB </span>","children":null,"spread":false},{"title":"dual_1024RAM.v <span style='color:#111;'> 9.47KB </span>","children":null,"spread":false},{"title":"dual_1024RAM_bb.v <span style='color:#111;'> 7.85KB </span>","children":null,"spread":false},{"title":"dual_port_512RAM.v <span style='color:#111;'> 9.50KB </span>","children":null,"spread":false},{"title":"buffer_r.v <span style='color:#111;'> 1.79KB </span>","children":null,"spread":false},{"title":"FIFO_W.v <span style='color:#111;'> 7.66KB </span>","children":null,"spread":false},{"title":"buffer.v <span style='color:#111;'> 2.96KB </span>","children":null,"spread":false},{"title":"dual_port_1024RAM.v <span style='color:#111;'> 9.52KB </span>","children":null,"spread":false},{"title":"SDRAM2.v <span style='color:#111;'> 2.23KB </span>","children":null,"spread":false},{"title":"FIFO_R.v <span style='color:#111;'> 17.52KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}]