[{"title":"( 5 个子文件 2KB ) 通信位同步的verilog代码,很有参考意义","children":[{"title":"Loop_Filter.v <span style='color:#111;'> 2.94KB </span>","children":null,"spread":false},{"title":"Num_creat.v <span style='color:#111;'> 376B </span>","children":null,"spread":false},{"title":"phase_detector.v <span style='color:#111;'> 2.85KB </span>","children":null,"spread":false},{"title":"bit_synchronize.v <span style='color:#111;'> 720B </span>","children":null,"spread":false},{"title":"clock_devide.v <span style='color:#111;'> 782B </span>","children":null,"spread":false}],"spread":true}]