[{"title":"( 110 个子文件 1.66MB ) 基于VHDL和ISE平台编写的UART设计","children":[{"title":"fuse.xmsgs <span style='color:#111;'> 367B </span>","children":null,"spread":false},{"title":"top.cmd_log <span style='color:#111;'> 1.97KB </span>","children":null,"spread":false},{"title":"xilinxsim.ini <span style='color:#111;'> 16B </span>","children":null,"spread":false},{"title":"transfer.vhd <span style='color:#111;'> 3.95KB </span>","children":null,"spread":false},{"title":"test_baud_isim_beh.wdb <span style='color:#111;'> 6.10KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]