基于Verilog HDL的CAN代码实现

[{"title":"（ 707 个子文件 1.64MB ） 基于Verilog HDL的CAN代码实现","children":[{"title":"CAN.gif <span style='color:#111;'> 15.37KB </span>","children":null,"spread":false},{"title":"can_registers.v <span style='color:#111;'> 35.68KB </span>","children":null,"spread":false},{"title":"can_defines.v <span style='color:#111;'> 5.20KB </span>","children":null,"spread":false},{"title":"can_bsp.v <span style='color:#111;'> 63.99KB </span>","children":null,"spread":false},{"title":"can_crc.v <span style='color:#111;'> 4.39KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]