基于Verilog的cordic反正切FPGA例程

[{"title":"（ 989 个子文件 11.07MB ） 基于Verilog的cordic反正切FPGA例程","children":[{"title":"test_atan.done <span style='color:#111;'> 26B </span>","children":null,"spread":false},{"title":"test_atan.fit.summary <span style='color:#111;'> 618B </span>","children":null,"spread":false},{"title":"test_atan.sof <span style='color:#111;'> 350.14KB </span>","children":null,"spread":false},{"title":"test_atan.map.rpt <span style='color:#111;'> 44.82KB </span>","children":null,"spread":false},{"title":"test_atan.map.summary <span style='color:#111;'> 478B </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多，未全部展示</span>","children":null,"spread":false}],"spread":true}]