基于FPGA的PCI接口源代码及Testbench Verilog程序代码

[{"title":"（ 30 个子文件 943KB ） 基于FPGA的PCI接口源代码及Testbench Verilog程序代码","children":[{"title":"基于FPGA的PCI接口源代码及Testbench Verilog程序代码","children":[{"title":"rd1008","children":[{"title":"pci_clk_reset.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false},{"title":"config_mux.v <span style='color:#111;'> 15.20KB </span>","children":null,"spread":false},{"title":"tstbench.zip <span style='color:#111;'> 14.50KB </span>","children":null,"spread":false},{"title":"tstbench","children":[{"title":"pci_clk_reset.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false},{"title":"tasks.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"bkend_daemon.v <span style='color:#111;'> 14.84KB </span>","children":null,"spread":false},{"title":"pci_stim.v <span style='color:#111;'> 23.01KB </span>","children":null,"spread":false},{"title":"pci_tb.v <span style='color:#111;'> 10.64KB </span>","children":null,"spread":false}],"spread":true},{"title":"state_machine.v <span style='color:#111;'> 21.54KB </span>","children":null,"spread":false},{"title":"rd1008.pdf <span style='color:#111;'> 645.70KB </span>","children":null,"spread":false},{"title":"retry_count.v <span style='color:#111;'> 3.00KB </span>","children":null,"spread":false},{"title":"glue.v <span style='color:#111;'> 3.09KB </span>","children":null,"spread":false},{"title":"pargen.v <span style='color:#111;'> 3.72KB </span>","children":null,"spread":false},{"title":"pci_top.v <span style='color:#111;'> 9.90KB </span>","children":null,"spread":false},{"title":"base_addr_chk.v <span style='color:#111;'> 6.33KB </span>","children":null,"spread":false}],"spread":false},{"title":"使用说明请参看右侧注释====〉〉.txt <span style='color:#111;'> 774B </span>","children":null,"spread":false},{"title":"PCI","children":[{"title":"pci_clk_reset.v <span style='color:#111;'> 2.99KB </span>","children":null,"spread":false},{"title":"config_mux.v <span style='color:#111;'> 15.20KB </span>","children":null,"spread":false},{"title":"tasks.v <span style='color:#111;'> 9.62KB </span>","children":null,"spread":false},{"title":"bkend_daemon.v <span style='color:#111;'> 14.84KB </span>","children":null,"spread":false},{"title":"pci_stim.v <span style='color:#111;'> 23.01KB </span>","children":null,"spread":false},{"title":"tstbench.zip <span style='color:#111;'> 14.50KB </span>","children":null,"spread":false},{"title":"state_machine.v <span style='color:#111;'> 21.54KB </span>","children":null,"spread":false},{"title":"rd1008.pdf <span style='color:#111;'> 645.70KB </span>","children":null,"spread":false},{"title":"retry_count.v <span style='color:#111;'> 3.00KB </span>","children":null,"spread":false},{"title":"glue.v <span style='color:#111;'> 3.09KB </span>","children":null,"spread":false},{"title":"pci_tb.v <span style='color:#111;'> 10.64KB </span>","children":null,"spread":false},{"title":"pargen.v <span style='color:#111;'> 3.72KB </span>","children":null,"spread":false},{"title":"pci_top.v <span style='color:#111;'> 9.90KB </span>","children":null,"spread":false},{"title":"base_addr_chk.v <span style='color:#111;'> 6.33KB </span>","children":null,"spread":false}],"spread":false}],"spread":true}],"spread":true}]