verilog实现的SPI总线

上传者: fenglangzhuizuo | 上传时间: 2021-04-19 21:31:30 | 文件大小: 308KB | 文件类型: ZIP
用verilog实现的SPI总线,这是我工作用的SPI总线,主体代码都在,还有testbench,是基于Xilinx平台使用的,和大家分享一下,用于学习交流~

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</span>","children":null,"spread":false},{"title":"SPI_Master.cmp.tdb <span style='color:#111;'> 13.56KB </span>","children":null,"spread":false},{"title":"SPI_Master.csf.qmsg <span style='color:#111;'> 119.10KB </span>","children":null,"spread":false},{"title":"SPI_Master(4).cnf.hdb <span style='color:#111;'> 726B </span>","children":null,"spread":false},{"title":"prev_cmp_SPI_Master.fit.qmsg <span style='color:#111;'> 47.70KB </span>","children":null,"spread":false},{"title":"SPI_Master.cmp.hdb <span style='color:#111;'> 12.49KB </span>","children":null,"spread":false},{"title":"SPI_Master(1).cnf.cdb <span style='color:#111;'> 1.04KB </span>","children":null,"spread":false},{"title":"SPI_Master.dbp <span style='color:#111;'> 0B </span>","children":null,"spread":false},{"title":"SPI_Master.db_info <span style='color:#111;'> 109B </span>","children":null,"spread":false},{"title":"SPI_Master.sgdiff.hdb <span style='color:#111;'> 14.78KB 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style='color:#111;'> 1.41KB </span>","children":null,"spread":false},{"title":"SPI_Master_test.v <span style='color:#111;'> 10.15KB </span>","children":null,"spread":false},{"title":"vsim.wlf <span style='color:#111;'> 40.00KB </span>","children":null,"spread":false},{"title":"work","children":[{"title":"_info <span style='color:#111;'> 557B </span>","children":null,"spread":false},{"title":"@s@p@i_master_test","children":[{"title":"_primary.vhd <span style='color:#111;'> 90B </span>","children":null,"spread":false},{"title":"transcript <span style='color:#111;'> 130B </span>","children":null,"spread":false},{"title":"verilog.psm <span style='color:#111;'> 61.74KB </span>","children":null,"spread":false},{"title":"_primary.dat <span style='color:#111;'> 6.85KB </span>","children":null,"spread":false}],"spread":true},{"title":"@s@p@i_@master","children":[{"title":"_primary.vhd <span style='color:#111;'> 583B </span>","children":null,"spread":false},{"title":"verilog.psm <span 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评论信息

  • lxg0927 :
    博主你好,请问有详细的解说文档吗
    2018-12-12
  • theouter :
    不错,是想要的
    2015-02-11

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