[{"title":"( 498 个子文件 3.27MB ) Altera FPGA/CPLD设计-高级版随书代码.rar","children":[{"title":"MY_DQS.BSF <span style='color:#111;'> 4.19KB </span>","children":null,"spread":false},{"title":"MY_DQ_BB.V <span style='color:#111;'> 4.78KB </span>","children":null,"spread":false},{"title":"MY_DQS_INST.V <span style='color:#111;'> 274B </span>","children":null,"spread":false},{"title":"EPLL.BSF <span style='color:#111;'> 4.95KB </span>","children":null,"spread":false},{"title":"MY_DQS_BB.V <span style='color:#111;'> 7.06KB </span>","children":null,"spread":false},{"title":"......","children":null,"spread":false},{"title":"<span style='color:steelblue;'>文件过多,未全部展示</span>","children":null,"spread":false}],"spread":true}]