adisimpll_v5_20_02_setup.zip

上传者: daiwennan | 上传时间: 2021-08-24 09:56:00 | 文件大小: 9.74MB | 文件类型: ZIP
The ADIsimPLL design tool is a comprehensive and easy-to-use PLL synthesizer design and simulation tool. All key non-linear effects that can impact PLL performance can be simulated, including phase noise, Fractional-N spurs, and anti-backlash pulse. Fully compatible with prior releases, the ADIsimPLL design tool eliminates time-consuming iterations from the PLL/synthesizer development process. The ADF4xxx family of synthesizers serve a range of applications such as wireless base stations, LAN, mobile handsets and PDAs, broadband wireless access, industrial, instrumentation and test equipment, satellite, sonar, and CATV. Analog Devices' ADIsimPLL design tool offers support for the company's latest PLL synthesizers, including the new highly-integrated ADF4351 PLL for base station and general-purpose applications and the ADRF6850 integrated broadband receiver for satellite applications.

文件下载

资源详情

[{"title":"( 1 个子文件 9.74MB ) adisimpll_v5_20_02_setup.zip","children":[{"title":"ADIsimPLL_V5_20_02_setup.exe <span style='color:#111;'> 9.77MB </span>","children":null,"spread":false}],"spread":true}]

评论信息

  • tiankong25 :
    资源没有问题,可以正常使用
    2020-12-07

免责申明

【只为小站】的资源来自网友分享,仅供学习研究,请务必在下载后24小时内给予删除,不得用于其他任何用途,否则后果自负。基于互联网的特殊性,【只为小站】 无法对用户传输的作品、信息、内容的权属或合法性、合规性、真实性、科学性、完整权、有效性等进行实质审查;无论 【只为小站】 经营者是否已进行审查,用户均应自行承担因其传输的作品、信息、内容而可能或已经产生的侵权或权属纠纷等法律责任。
本站所有资源不代表本站的观点或立场,基于网友分享,根据中国法律《信息网络传播权保护条例》第二十二条之规定,若资源存在侵权或相关问题请联系本站客服人员,zhiweidada#qq.com,请把#换成@,本站将给予最大的支持与配合,做到及时反馈和处理。关于更多版权及免责申明参见 版权及免责申明