上传者: Cowbody
|
上传时间: 2021-04-22 15:54:49
|
文件大小: 654KB
|
文件类型: PDF
This document defines the PWM control chip features for the VRD12, VRM12 & IMVP7
CPU dc-dc converters used in Intel platforms. VR12/IMVP7 includes a Serial VID (SVID)
interface; benefits of SVID can be seen in reduced number of required pins and 2 way
communications between the CPU and VR. Future platform power delivery design
guidelines will contain the actual platform implementations for IMVP7 or VRD12 in
mobility, desktop and server market segments and takes precedent over targets shown
in this document.