2023年电赛H题(信号分离装置)-FPGA+stm32解法

上传者: 2401_83129457 | 上传时间: 2025-10-24 09:30:48 | 文件大小: 236.45MB | 文件类型: ZIP
本文介绍了一种基于FPGA和STM32的波形解调与重构系统设计方案。系统通过高速ADC采样输入信号C,经FIFO缓冲后由FPGA串口发送至STM32进行FFT分析,识别出A、B两路波形的类型和频率。FPGA接收识别结果后,利用DDS模块重构信号并通过锁相环消除相位漂移。系统还实现了相位差可调功能,可通过按键设置A'和B'的相位差,并在数码管上显示。整个系统采用模块化设计,包含FIFO缓冲、串口通信、FFT分析、DDS生成、锁相环和移相等功能模块,最终通过高速DAC输出重构的A'和B'信号。

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