顺络叠层电感0603

Monza 4 Tag Chip Datasheet R10 20160817

WindRiver_On-chip_Debugging_Guide_1.2

单片机课程作业，屏幕显示，SPI通信，准确走时，使用AD采样

IC设计三大经典书籍，Advanced ASIC Chip Synthesis Using Synopsys Design Compiler,physical compiler and Primetime

The RoCC interface enables the integration of custom coprocessors or accelerators to RISC-V cores. The purpose of the document is to understand the RoCC interface signals from the perspective of designing a RISC-V compatible accelerator in Verilog.

This book targets engineers and researchers familiar with basic computer architecture concepts who are interested in learning about on-chip networks. This work is designed to be a short synthesis of the most critical concepts in on-chip network design. It is a resource for both understanding on-chip network basics and for providing an overview of state of-the-art research in on-chip networks. We believe that an overview that teaches both fundamental concepts and highlights state-of-the-art designs will be of great value to both graduate students and industry engineers. While not an exhaustive text, we hope to illuminate fundamental concepts for the reader as well as identify trends and gaps in on-chip network research.

a book about on-chip networks. quite new!

Low_Power_Methodology_Manual_For_System-On-Chip_Design书的中文学习笔记

synopsys出品的经典低功耗书籍。synopsys出品的经典低功耗书籍。