本文详细介绍了如何使用 Matlab 的 C MEX S-Function 编写 XPC 环境下板卡驱动 的方法。本文的主要目的是使相关开发人员阅读之后能够了解 XPC 的工作原理并能开 发实际的驱动程序
2019-12-21 18:52:24 2.07MB xpc matlab pci 驱动
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本文根据研究课题实用化被动毫米波雷达,结合项目背景和需求,设计开发了基于PCI总线的高速数据采集系统,该数据卡以FPGA为核心器件,其它外围接口的控制逻辑、芯片控制逻辑均由FPGA实现,与上位机之间的通信通过PCI 总线完成。FPGA的内部逻辑设计和算法实现是本文讨论的重点。大量外围芯片功能集中在单个FPGA芯片中,大大提高了系统的集成度和可靠性。
2019-12-21 18:51:05 1.5MB PCI总线 高速数据采集系统
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被动毫米波雷达中基于PCI总线的数据采集系统设计
2019-12-21 18:48:40 2.57MB 被动 毫米波雷达 PCI
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PCI Express 3.0 is the latest generation of the popular peripheral interface found in virtually every PC, server, and industrial computer. Its high bandwidth, low latency, and cost-to-performance ratio make it a natural choice for many peripheral devices today. Each new generation of PCI Express adds more features, capabilities and bandwidth, which maintains its popularity as a device interconnect. MindShare's books take the hard work out of deciphering the specs, and this one follows that tradition. MindShare's PCI Express Technology book provides a thorough description of the interface with numerous practical examples that illustrate the concepts. Written in a tutorial style, this book is ideal for anyone new to PCI Express. At the same time, its thorough coverage of the details makes it an essential resource for seasoned veterans. 主要内容如下: PCI Express Origins Configuration Space and Access Methods Enumeration Process Packet Types and Fields Transaction Ordering Traffic Classes, Virtual Channels and Arbitration (QoS) Flow Control ACK/NAK Protocol Logical PHY (8b/10b, 128b/130b, Scrambling) Electrical PHY Link Training and Initialization Interrupt Delivery (Legacy, MSI, MSI-X) Error Detection and Reporting Power Management (for both software and hardware) 2.0 and 2.1 Features (such as 5.0GT/s, TLP Hints, and Multi-Casting) 3.0 Features (such as 8.0GT/s, and a new encoding scheme) Considerations for High Speed Signaling (such as Equalization)
2019-11-19 21:16:53 47.38MB mindshare pcie
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linux C获取PCI设备名和厂商名,编译时加上-lpci
2016-02-03 00:00:00 833B LinuxC
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此书对pcie协议分析非常到位,简明清晰,是英文版,但非常值得一读!
2014-08-06 00:00:00 12.57MB pcie
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PCI Express系统体系结构标准教材.pdf
2013-07-20 00:00:00 114.01MB PCI Express
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系统刚上电时,CPU从0xbfc0.0000开始执行。这个地址在Rom空间中,在完成TLB,Cache,UART等初始化后,CPU就将代码拷到0x8010.0000开始的RAM空间(这个地址是编译Pmon时分配符号_start的),然后跳转到initmips(),开始在内存空间的执行。 执行initmips之前,CPU做的初始化只是初步的,其作用只是为CPU在内存中运行做一些必要的准备。主要的初始化工作:PCI设备的扫描、空间映射、资源分配都是initmips()函数所完成的。
2012-09-23 00:00:00 251KB PCI 初始化
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PCI设备BAR空间的初始化详细的中文说明文档。合适PCI开发的硬件和软件人员作为参考
2011-12-12 00:00:00 88KB PCI BAR空间的初始化
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PCI 控制 硬件 测试指令 通过测试指令向PCI发送地址和数据,到达外部测试版
2011-11-17 00:00:00 2.87MB PCI 控制 硬件 测试指令
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